noc_ccu_ios_emac_tbu_m_I_main_TransactionStatFilter Address Map

Module Instance	Base Address	End Address
`i_noc_ccu_ios_emac_tbu_m_I_main_TransactionStatFilter`	`0xFFD24400`	`0xFFD2447F`

Register	Offset	Width	Access	Reset Value	Description
`emac_tbu_m_I_main_TransactionStatFilter_Id_CoreId`	`0x0`	`32`	`RO`	`0xBB0AE409`
`emac_tbu_m_I_main_TransactionStatFilter_Id_RevisionId`	`0x4`	`32`	`RO`	`0x00014800`
`emac_tbu_m_I_main_TransactionStatFilter_Mode`	`0x8`	`32`	`RW`	`0x00000000`
`emac_tbu_m_I_main_TransactionStatFilter_AddrBase_Low`	`0xC`	`32`	`RW`	`0x00000000`
`emac_tbu_m_I_main_TransactionStatFilter_AddrBase_High`	`0x10`	`32`	`RW`	`0x00000000`
`emac_tbu_m_I_main_TransactionStatFilter_AddrWindowSize`	`0x14`	`32`	`RW`	`0x00000000`
`emac_tbu_m_I_main_TransactionStatFilter_Opcode`	`0x20`	`32`	`RW`	`0x00000000`	This register selects candidate packets based on packet opcodes. (0 disables the filter):
`emac_tbu_m_I_main_TransactionStatFilter_UserBase`	`0x24`	`32`	`RW`	`0x00000000`
`emac_tbu_m_I_main_TransactionStatFilter_UserMask`	`0x28`	`32`	`RW`	`0x00000000`
`emac_tbu_m_I_main_TransactionStatFilter_SecurityBase`	`0x2C`	`32`	`RW`	`0x00000000`
`emac_tbu_m_I_main_TransactionStatFilter_SecurityMask`	`0x30`	`32`	`RW`	`0x00000000`