emac_tbu_m_I_main_TransactionStatFilter_Id_CoreId

         
      
Module Instance Base Address Register Address
i_noc_ccu_ios_emac_tbu_m_I_main_TransactionStatFilter 0xFFD24400 0xFFD24400

Size: 32

Offset: 0x0

Access: RO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

CORECHECKSUM

RO 0xBB0AE4

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

CORECHECKSUM

RO 0xBB0AE4

CORETYPEID

RO 0x9

emac_tbu_m_I_main_TransactionStatFilter_Id_CoreId Fields

Bit Name Description Access Reset
31:8 CORECHECKSUM
Field containing a checksum of the parameters of the IP.
RO 0xBB0AE4
7:0 CORETYPEID
Field identifying the type of IP.
RO 0x9