Product Collection
Marketing Status
Launched
Launch Date
2014
Lithography
55 nm

Resources

Logic Elements (LE)
50000
Fabric and I/O Phase-Locked Loops (PLLs)
4
Maximum Embedded Memory
1.638 Mb
Digital Signal Processing (DSP) Format
Multiply
Hard Memory Controllers
No
External Memory Interfaces (EMIF)
DDR2 SDRAM, DDR3 SDRAM, LPDDR2, SRAM
User-Flashable Memory
Yes
Internal Configuration Storage
Yes

I/O Specifications

Maximum User I/O Count
500
I/O Standards Support
3.0 V to 3.3 V LVTTL, 1.0 V to 3.3 V LVCMOS, PCI, SSTL, HSTL, HSUL, Differential SSTL, Differential HSTL, Differential HSUL, LVDS, Mini-LVDS, RSDS, LVPECL, PPDS, BLVDS, TMDS, Sub-LVDS, SLVS, HiSpi
Maximum LVDS Pairs
30

Advanced Technologies

FPGA Bitstream Security
Yes
Analog-to-Digital Converter
Yes

Package Specifications

Package Options
F256, F484, F672, E144

Supplemental Information