Reed Solomon II Intel® FPGA IP Core

The Reed Solomon II Intel® FPGA intellectual property (IP) core offers a fully parameterizable Reed Solomon encoder and decoder. These encoders and decoders are widely used for error detection and correction in a wide range of digital signal processing (DSP) applications for storage, retrieval, and transmission of data. The Reed Solomon II Intel FPGA IP core is designed to support optical transport network (OTN) applications.

Read the High-speed Reed-Solomon IP core user guide ›

Reed Solomon II Intel® FPGA IP Core

Features

Number of symbols per code word (range: 204 to 255)

Additional Resources

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Technical Support

For technical support on this IP core, please visit Support Resources or Intel® Premier Support. You may also search for related topics on this function in the Knowledge Center and Communities.

IP Evaluation and Purchase

Evaluation mode and purchasing information for Altera® FPGA Intellectual Property cores.

IP Base Suite

Free Altera® FPGA IP Core licenses with an active license for Quartus® Prime Standard or Pro Edition Software.

Design Examples

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