Scalable Scatter-Gather DMA Intel® FPGA IP Design Example User Guide

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ID 823179
Date 1/27/2025
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Document Table of Contents
Document Table of Contents x
1. Design Example Description 2. Quick Start Guide 3. Document Revision History for the Scalable Scatter-Gather DMA Intel® FPGA IP Design Example User Guide
1. Design Example Description x
1.1. H2D ST to D2H ST Loopback Design Example
1.1. H2D ST to D2H ST Loopback Design Example x
1.1.1. DMA PCIe* Mode Design Example 1.1.2. DMA SoC Mode Design Example
2. Quick Start Guide x
2.1. Directory Structure 2.2. Generating the Design Example 2.3. Simulating the Design Example 2.4. Testbench 2.5. Compiling the Design Example
2.3. Simulating the Design Example x
2.3.1. DMA SoC Mode Example Design 2.3.2. DMA PCIe Mode Example Design
2.3.2. DMA PCIe Mode Example Design x
2.3.2.1. Running Simulation using VCS* MX 2.3.2.2. Running Simulation Using QuestaSim*
2.4. Testbench x
2.4.1. DMA SoC Mode H2D ST to D2H ST Loopback Example Testbench 2.4.2. DMA PCIe Mode H2D ST to D2H ST Loopback & H2D MM Example Testbench
1. Design Example Description
2. Quick Start Guide
3. Document Revision History for the Scalable Scatter-Gather DMA Intel® FPGA IP Design Example User Guide

2.3.2.2. Running Simulation Using QuestaSim*

Use the following working directory: <example_design>/pcie_ed_tb/pcie_ed_tb/sim/mentor/
  1. Invoke the QuestaSim* simulator. For Linux environment, run the following command to invoke the QuestaSim* simulator.
    vsim &
  2. Run the following command in the QuestaSim* console window: 
    do msim_setup.tcl
  3. If you are using Windows environment, run the following command in the QuestaSim* console window. Skip this step if you are using Linux environment.
    set TOP_LEVEL_NAME “pcie_ed_tb.pcie_ed_tb”
  4. Run the command below in the QuestaSim* console window to enable PCIe FASTSIM mode.
    set USER_DEFINED_COMPILE_OPTIONS “+define+IP7521SERDES_UX_SIMSPEED”
  5. Run the following command in the QuestaSim* console window to compile and simulate the design: 
    ld_debug 
run -all
    A successful simulation ends with the following message in the simulation.log file that was generated. 
    "Simulation stopped due to successful completion!"
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