GTS Ethernet Intel® FPGA Hard IP Release Notes

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ID 817771
Date 11/04/2024
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1. GTS Ethernet FPGA Hard IP Release Notes
1. GTS Ethernet FPGA Hard IP Release Notes x
1.1. GTS Ethernet Intel® FPGA Hard IP v6.0.0 1.2. GTS Ethernet Intel® FPGA Hard IP v5.0.0 1.3. GTS Ethernet Intel® FPGA Hard IP v4.0.0 1.4. GTS Ethernet Intel® FPGA Hard IP User Guide Archives
1. GTS Ethernet FPGA Hard IP Release Notes

1.2. GTS Ethernet Intel® FPGA Hard IP v5.0.0

Table 2.  v5.0.0 2024.07.08
Quartus® Prime Version Description Impact
24.2 Added Analog Parameters tab in the IP GUI. Analog settings can now be configured through either the IP GUI or the .qsf file.
Added support for Agilex™ 5 E-Series device group A FPGAs. —
Added support for 25GE-1 Ethernet Mode. —
Added support for IEEE 802.3 RS(528,514) (CL 91). —
Added support for Agilex™ 5 E-Series 065B Premium Development Kit (ES1) board in the Example Design tab of the IP GUI. —
Added support for Agilex™ 5 D-Series FPGAs1. —
1 Device support for Agilex™ 5 D-Series FPGAs and SoCs in the Quartus® Prime Pro Edition software version 24.2 is restricted. To enable D-Series device support in your instance of the Quartus® Prime Pro Edition software, contact your regional Altera sales representative.
Level Two Title