Hard Processor System Technical Reference Manual: Agilex™ 5 SoCs

ID 814346
Date 7/07/2025
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Ixiasoft

Document Table of Contents

12.1.5. HPS Mailbox Address Map and Register Definitions

The HPS mailbox register map is divided into four different address spaces as shown in the following table.

Table 368.  HPS Mailbox Register Map Sections
Start Address Span (bytes) Description
Mailbox memory 256 Mailbox memory
SDM2HPS doorbell 4 Register handles receipt of interrupts from SDM
HPS2SDM doorbell 4 Register for sending interrupts to SDM
Streaming interface 256 Interface for streaming data to SDM