Hard Processor System Technical Reference Manual: Agilex™ 5 SoCs
Visible to Intel only — GUID: lfb1679440042124
Ixiasoft
Visible to Intel only — GUID: lfb1679440042124
Ixiasoft
5.8.6.5.12.1. Detecting Error Type in the Processed Commands
The ERR_STATUS field in the RESPONSE_QUEUE_PORT register is used to detect the error type in the processed commands.
This field indicates errors based on the codes shown in the following table.
ERROR_CODE | ERROR_TYPE | ERROR_DESCRIPTION |
---|---|---|
0x0 | NO_ERR | Initiated transfer is successful without any errors |
0x1 | CRC_ERR | Not applicable in SDR |
0x2 | PARITY_ERR | Not applicable in SDR |
0x3 | FRAME_ERR | Not applicable in SDR |
0x4 | ADDR_HDR_NACK_ERR | Received NACK for the address header. Indicates no I3C slave is present in the system |
0x5 | ADDR_NACK_ERR | Received NACK for slave address of write/read transfer OR Received NACK for assign address of ENTDAA transfer |
0x6 | OVL_URL_ERROR | Not applicable in SDR |
0x7 | Reserved | Reserved |
0x8 | ABORT_ERR | Transfer is aborted based on the user-initiated abort |
0x9 | I2C_WR_DATA_NACK_ERR | Received NACK for the I2C Write Data Transfer |
Refer to the Response Data Structure section for information on the data written in RESPONSE_QUEUE_PORT register.