GTS JESD204C Intel® FPGA IP Release Notes

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ID 813976
Date 12/13/2024
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1. GTS JESD204C Intel® FPGA IP Release Notes
1. GTS JESD204C Intel® FPGA IP Release Notes x
1.1. GTS JESD204C Intel® FPGA IP v4.0.0 1.2. GTS JESD204C Intel® FPGA IP v2.0.0
1. GTS JESD204C Intel® FPGA IP Release Notes

1.1. GTS JESD204C Intel® FPGA IP v4.0.0

Table 1.  v4.0.0 2024.11.25
Quartus® Prime Version Description Impact
24.3
  • Added Agilex™ 5 D-Series devices support.
  • Added analog parameter panel feature. User can set the analog parameters through the Analog Parameters tab in the parameter editor.
  • Fixed critical warnings in the Example Design.
  • Enabled hardware board selection for the Example Design in the IP Parameter Editor.
  • Enabled dual simplex support through Dual Simplex (DS) Assignment Editor tool.
 Regenerate your IP to use the new features.
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