GTS AXI Streaming Intel® FPGA IP for PCI Express* User Guide
Visible to Intel only — GUID: qcm1696475521082
Ixiasoft
Visible to Intel only — GUID: qcm1696475521082
Ixiasoft
4.4. Hard IP Interface (IF) Adaptor
The PCIe* Hard IP (HIP) interfaces with the HIP IF Adaptor in the GTS AXI Streaming IP. The HIP IF adaptor acts as an interface between the HIP and the downstream logic. The HIP IF Adaptor provides a standardized interface to the downstream logic by performing the required width and format adaptation depending on the HIP’s AXI-Stream and user interfaces. The clock domain crossing module allows downstream logic to run at different frequencies.