5. Known Issues and Workarounds

Intel® FPGA AI Suite: Version 2023.2.1 Release Notes

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ID 772497

Date 9/06/2023

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5. Known Issues and Workarounds

Known Issues and Workarounds in Intel® FPGA AI Suite Version 2023.2.1

There are no known issues in Intel® FPGA AI Suite Version 2023.2.1.

Known Issues and Workarounds in Intel® FPGA AI Suite Version 2023.2

When a graph has multiple subgraphs, the dla_compiler performance estimator might estimate the performance of the combined graph incorrectly.
When multiple subgraphs exist, you can validate the performance calculation as follows:
1. Gather the performance estimates for each subgraph (fps₁, fps₂, and so on), but ignore the estimates for any CPU subgraphs.
2. Calculate the latency of the combined graph from the performance estimates for each subgraph:
  $combined_latency = \frac{1}{{fps}_{1}} + \frac{1}{{fps}_{2}} + ...$
3. Calculate the performance of the combined graph:
  ${fps}_{combined} = \frac{1}{combined_latency}$
Issue Fixed: This issue is fixed in Intel® FPGA AI Suite Version 2023.2.1
The runtime for the PCIe-based design example does not compile on Red Hat* Enterprise Linux* 8 due to the presence of an old version of the gflags library. To resolve this issue:
1. Run the following command:
```
sudo sed -i -e "s/DEFINE_uint32/DEFINE_int32/" \
         $COREDLA_ROOT/runtime/dla_benchmark/dla_benchmark.hpp
```
2. If you have $COREDLA_WORK defined, run the following command:
```
sed -i -e "s/DEFINE_uint32/DEFINE_int32/" \
    $COREDLA_WORK/runtime/dla_benchmark/dla_benchmark.hpp
```
Note that Red Hat 8 does not support execution of either PCIe-based design example. This change enables only compilation of the runtime (and only if the necessary BSP is installed).

Issue Fixed: This issue is fixed in Intel® FPGA AI Suite Version 2023.2.1