FPGA AI Suite: PCIe-based Design Example User Guide

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ID 768977
Date 12/16/2024
Public
Document Table of Contents
Document Table of Contents x
1. FPGA AI Suite PCIe-based Design Example User Guide 2. About the PCIe* -based Design Example 3. Getting Started with the FPGA AI Suite PCIe* -based Design Example 4. Building the FPGA AI Suite Runtime 5. Running the Design Example Demonstration Applications 6. Design Example Components 7. Design Example System Architecture for the Agilex™ 7 FPGA A. FPGA AI Suite PCIe-based Design Example User Guide Archives B. FPGA AI Suite PCIe-based Design Example User Guide Document Revision History
4. Building the FPGA AI Suite Runtime x
4.1. CMake Targets 4.2. Build Options
5. Running the Design Example Demonstration Applications x
5.1. Exporting Trained Graphs from Source Frameworks 5.2. Compiling Exported Graphs Through the FPGA AI Suite 5.3. Compiling the PCIe* -based Example Design 5.4. Programming the FPGA Device ( Agilex™ 7) 5.5. Performing Accelerated Inference with the dla_benchmark Application 5.6. Running the Ported OpenVINO™ Demonstration Applications
5.5. Performing Accelerated Inference with the dla_benchmark Application x
5.5.1. Inference on Image Classification Graphs 5.5.2. Inference on Object Detection Graphs 5.5.3. Additional dla_benchmark Options 5.5.4. The dla_benchmark Performance Metrics
5.5.2. Inference on Object Detection Graphs x
5.5.2.1. The mAP and COCO AP Metrics 5.5.2.2. Specifying Ground Truth 5.5.2.3. Example of Inference on Object Detection Graphs
5.5.4. The dla_benchmark Performance Metrics x
5.5.4.1. Interpreting System Throughput and Latency Metrics
5.6. Running the Ported OpenVINO™ Demonstration Applications x
5.6.1. Example Running the Object Detection Demonstration Application
6. Design Example Components x
6.1. Build Script 6.2. Example Architecture Bitstream Files 6.3. Software Components 6.4. Software Interface to the BSP
6.1. Build Script x
6.1.1. Build Script Options 6.1.2. Script Flow
6.3. Software Components x
6.3.1. OpenVINO™ FPGA Runtime Plugin 6.3.2. FPGA AI Suite Runtime 6.3.3. BSP Driver
7. Design Example System Architecture for the Agilex™ 7 FPGA x
7.1. System Overview 7.2. Hardware
7.2. Hardware x
7.2.1. PLL Adjustment
1. FPGA AI Suite PCIe-based Design Example User Guide
2. About the PCIe* -based Design Example
3. Getting Started with the FPGA AI Suite PCIe* -based Design Example
4. Building the FPGA AI Suite Runtime
5. Running the Design Example Demonstration Applications
6. Design Example Components
7. Design Example System Architecture for the Agilex™ 7 FPGA
A. FPGA AI Suite PCIe-based Design Example User Guide Archives
B. FPGA AI Suite PCIe-based Design Example User Guide Document Revision History

B. FPGA AI Suite PCIe-based Design Example User Guide Document Revision History

Document Version FPGA AI SuiteVersion Changes
2024.12.16 2024.3
  • Various minor corrections and typo fixes.
2024.11.25 2024.3
  • References to "software reference" have been replaced with "software emulator" or "software emulation.". As part of this change, the --target_reference option of the build.runtime.sh script has been renamed to --target_emulation.
2024.07.31 2024.2
  • Added "The dla_benchmark Performance Metrics".
  • Added "Interpreting System Throughput and Latency Metrics".
  • Revised "Additional dla_benchmark Options".
  • Removed references to the Intel® PAC with Arria® 10 GX FPGA.

    The PCIe-based design example no longer supports the Intel® PAC with Arria® 10 GX FPGA.

  • Replaced references to the -plugins_xml_file option with the -plugins option. The -plugins_xml_file option is deprecated and will be removed in a future release.
  • Revised "Script Flow".
  • Revised "Hardware".
2024.03.29 2024.1
  • Added new options to "Additional dla_benchmark Options".
  • Added segmentation_demo to "Running the Ported OpenVINO™ Demonstration Applications".
2023.12.01 2023.3
  • Added --wsl and --finalize options to "Build Script Options".
2023.09.06 2023.2.1
  • Updated supported OpenVINO™ version to 2022.3.1 LTS.
2023.07.03 2023.2
  • Updated "Software Components".
  • Renamed "OPAE Driver" to "BSP Driver" and revised the content in the topic.
  • Updated supported OpenVINO™ version to 2022.3 LTS.
  • Updated OpenVINO™ installation paths to /opt/intel/openvino_2023.
  • Updated FPGA AI Suite installation paths to /opt/intel/fpga_ai_suite_2023.2.
  • Changed occurrences of tools/downloader/downloader.py to omz_downloader.
  • Changed occurrences of tools/downloader/converter.py to omz_converter.
2023.04.05 2023.1
  • Renamed the dlac command. The FPGA AI Suite compiler command is now dla_compiler.
  • Updated the Intel® Agilex™ product family name to "Intel Agilex® 7."
2022.12.23 2022.2
  • Removed the -f build script (dla_create_and_build_pcie_ed.py) option.
  • Renamed the benchmark_app to dla_benchmark.
  • Renamed dla_create_and_build_pcie_ed.py to dla_build_example_design.py
2022.05.26 2022.1.1
  • Updated description of how to run the OpenVINO demos.
2022.04.27 2022.1
  • Additional updates for Intel Agilex device support.
  • Updated the locations of graphs from the Getting Started tutorial.
2021.09.10 2021.2
  • Added updates for initial Intel Agilex device support.
2021.04.30 2021.1
  • Added additional demonstration programs.
  • Various corrections and updates.
2020.12.04 2020.2
  • Initial release.
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