Intel® FPGA AI Suite: Compiler Reference Manual

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ID 768972
Date 4/05/2023
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Document Table of Contents
Document Table of Contents x
1. Intel® FPGA AI Suite Compiler Reference Manual 2. About the Intel® FPGA AI Suite Compiler 3. Intel® FPGA AI Suite Compiler Use Modes 4. Intel® FPGA AI Suite Compiler Command Line Options A. Intel® FPGA AI Suite Compiler Reference Manual Archives B. Intel® FPGA AI Suite Compiler Reference Manual Document Revision History
3. Intel® FPGA AI Suite Compiler Use Modes x
3.1. Compiling a Graph 3.2. Estimating the Performance of a Graph 3.3. Estimating the Performance of a Partition of a Graph 3.4. Estimating the Area of an Architecture 3.5. Generating an Optimized Architecture
3.5. Generating an Optimized Architecture x
3.5.1. Generating an Architecture for Highest Performance 3.5.2. Generating an Architecture Optimized for a Frame Rate Target Value
4. Intel® FPGA AI Suite Compiler Command Line Options x
4.1. Inputs (dla_compiler Command Options) 4.2. Outputs (dla_compiler Command Options) 4.3. Reporting (dla_compiler Command Options) 4.4. Compilation Options (dla_compiler Command Options) 4.5. Architecture Options (dla_compiler Command Options) 4.6. Architecture Optimizer Options (dla_compiler Command Options) 4.7. Analyzer Tool Options (dla_compiler Command Options) 4.8. Miscellaneous Options (dla_compiler Command Options) 4.9. Input File Formats for dla_compiler Command 4.10. Generation of Output File Formats 4.11. The Partitioning Table Report
1. Intel® FPGA AI Suite Compiler Reference Manual
2. About the Intel® FPGA AI Suite Compiler
3. Intel® FPGA AI Suite Compiler Use Modes
4. Intel® FPGA AI Suite Compiler Command Line Options
A. Intel® FPGA AI Suite Compiler Reference Manual Archives
B. Intel® FPGA AI Suite Compiler Reference Manual Document Revision History

B. Intel® FPGA AI Suite Compiler Reference Manual Document Revision History

Document Version Intel® FPGA AI SuiteVersion Changes
2023.04.05 2023.1
  • Updated "Reporting (dla_compiler Command Options)".
  • Renamed thedlac command. The Intel® FPGA AI Suite compiler command is now dla_compiler.
  • Updated the Intel® Agilex™ product family name to "Intel Agilex® 7."
2022.12.23 2022.2
  • Added the --bin-data option of the dlac command.
  • Removed references to the --mfamily option of the dlac command. This option is no longer supported.

    Use the family parameter in the architecture description file (.arch) instead.

2022.05.26

2022.1.1
  • Added note that the architecture optimizer supports only interleaves 1xN and Nx1.

2022.04.27

2022.1
  • Removed some command options that were not implemented.
  • Added Intel Agilex® 7 device information where appropriate.

2021.09.10

2021.2
  • Maintenance release.

2021.04.30

2021.1
  • Improved information formatting and corrected the names of some command options.

2020.12.04

2020.2
  • The following dlac command options have been renamed:
    • --plugins_file is now --plugins-file
    • --network_file is now --network-file
    • --network_weightings is now --network-weightings

2020.10.30

2020.1
  • Initial release.
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