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1. Intel® FPGA AI Suite Getting Started Guide
2. Intel® FPGA AI Suite Components
3. Intel® FPGA AI Suite Installation Overview
4. Installing the Intel® FPGA AI Suite Compiler and IP Generation Tools
5. Installing the Intel® FPGA AI Suite PCIe-Based Design Example Prerequisites
6. Intel® FPGA AI Suite Quick Start Tutorial
A. Intel® FPGA AI Suite Getting Started Guide Archives
B. Intel® FPGA AI Suite Getting Started Guide Document Revision History
4.1. Supported FPGA Families
4.2. Operating System Prerequisites
4.3. Installing the Intel® FPGA AI Suite With System Package Management Tools
4.4. Installing OpenVINO™ Toolkit
4.5. Installing Intel® Quartus® Prime Pro Edition Software
4.6. Setting Required Environment Variables
4.7. Installing Intel® Threading Building Blocks (TBB)
4.8. Finalizing Your Intel® FPGA AI Suite Installation
6.1. Creating a Working Directory
6.2. Preparing OpenVINO™ Model Zoo
6.3. Preparing a Model
6.4. Running the Graph Compiler
6.5. Preparing an Image Set
6.6. Programming the FPGA Device
6.7. Performing Inference on the PCIe-Based Example Design
6.8. Building an FPGA Bitstream for the PCIe Example Design
6.9. Building the Example FPGA Bitstreams
6.10. Preparing a ResNet50 v1 Model
6.11. Performing Inference on the Inflated 3D (I3D) Graph
6.12. Performing Inference on YOLOv3 and Calculating Accuracy Metrics
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6.12. Performing Inference on YOLOv3 and Calculating Accuracy Metrics
This tutorial targets Intel® Arria® 10 devices and assumes that you have the following prerequisites completed:
- You have a copy of of OpenVINO™ Model Zoo 2022.3 in your $COREDLA_ROOT/demo/open_model_zoo/ directory.
- You have completed the steps in Preparing OpenVINO Model Zoo.
- You have programmed the Intel® Arria® 10 FPGA device with a bitstream that corresponds to A10_Performance.arch. For example instructions, refer to Building an FPGA Bitstream for the PCIe Example Design.
To target this tutorial to a different FPGA device, you can adjust the commands appropriately (such as using a a different architecture file like AGX7_Performance.arch to target Intel Agilex® 7 devices). Be sure that you are using an architecture file that includes support for YOLOv3 (and specifically the PReLU activation).
The steps in the sections that follow guide you through preparing a YOLOv3 model for inference, preparing a COCO validation dataset and annotations, as well as calculating mAP and COCO AP metrics.