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1. About the F-Tile 50G Ethernet Intel® FPGA IP User Guide
2. About this IP
3. Getting Started
4. F-tile 50G Ethernet Intel FPGA IP Parameters
5. Functional Description
6. Reset
7. Interfaces and Signal Descriptions
8. Control, Status, and Statistics Register Descriptions
9. Document Revision History for the F-Tile 50G Ethernet Intel® FPGA IP User Guide
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6. Reset
Control and Status registers control three parallel soft resets. These soft resets are not self-clearing. Software clears them by writing to the appropriate register. Asserting the external hard reset csr_rst_n returns Control and Status registers to their original values.
Figure 17. Conceptual Overview of Reset LogicThe three hard resets are top-level ports. The soft resets are internal signals which are outputs of the hard IP eth_reset register. Software writes the appropriate bit of the eth_reset to assert a soft reset.
The general reset signals reset the following functions:
- i_tx_rst_n: Resets the TX datapath (MAC, PCS, PMA, AIB). Active Low. Includes TX MAC, TX PCS, TX transceiver, and TX EMIB adapters.
- i_rx_rst_n: Resets the RX datapath (MAC, PCS, PMA, AIB). Active Low. Includes RX MAC, RX PCS, RX transceiver, and RX EMIB adapters.
- i_rst_n: Resets TX datapath (MAC, PCS, PMA, AIB). Active Low. Includes RX PCS, transceiver, and EMIB adapters.
- csr_rst_n: Resets TX and RX MAC CSR registers.
- i_reconfig_reset: Resets the configuration and status registers of MACs and transceivers. Active low.
- reset_status: Resets the Avalon® memory-mapped management interface.
Reset Signal | Datapath | PHY | Statistics | CSR | ||||||
---|---|---|---|---|---|---|---|---|---|---|
TX MAC | RX MAC | TX PCS | RX PCS | TX | RX | TX MAC | RX MAC | MAC | PHY | |
Port Reset | ||||||||||
i_rst_n | √ | √ | √ | √ | √ | √ | √ | √ | — | — |
i_tx_rst_n | √ | — | √ | — | √ | — | √ | √ | — | — |
i_rx_rst_n | — | √ | — | √ | — | √ | — | √ | — | — |
csr_rst_n | — | — | — | — | — | — | — | — | √ | — |
i_reconfig_reset | — | — | — | — | — | — | — | — | — | √ |
Register Reset | ||||||||||
eio_sys_rst | √ | √ | √ | √ | √ | √ | √ | √ | — | — |
soft_tx_rst | √ | — | √ | — | √ | — | √ | — | — | — |
soft_rx_rst | — | √ | — | √ | — | √ | — | √ | — | — |