Nios® V Processor Software Developer Handbook

ID 743810
Date 7/08/2024
Public
Document Table of Contents

10.3. Device Driver Cache Considerations

Device drivers typically access control registers associated with their device. These registers are mapped into the Nios® V processor address space. Apply the following considerations for the device driver cache:
  • The data cache must be bypassed when accessing device registers to ensure that accesses are not lost or deferred due to the data cache.
  • The device register must be located within a peripheral region to bypass the data cache.
  • HAL I/O macros cannot bypass the data cache.
  • Declaring a C pointer volatile does not make pointer accesses bypass the data cache. The volatile keyword merely prevents the compiler from optimizing out accesses using the pointer.