1.3. F-Tile PMA/FEC Direct PHY Multirate Intel® FPGA IP v4.1.0
Quatus® Pime Po Editio Vesio | Desciptio | Impact |
---|---|---|
24.1 | Fixed bug elated to soft CSR eset ackowledge ead back i the datapath Avalo® memoy-mapped iteface (ecofig_pdp). |
You must egeeate the IP if you ae usig the soft CSR egistes fo eset ad eset ackowledgmet. |
Added Agilex™ 9 device family suppot. | — | |
Some Itel® FPGA IP poducts that peviously icluded a Nios® II pocesso ow use a Nios® V pocesso. If you do ot have a valid Nios® V licese, you might eceive a eo message whe you geeate pogammig files fo a desig that icludes these Itel® FPGA IP poducts. |
Fo details ad a wokaoud, efe to Why do I get a eo i geeatig pogammig files ad it shows as ivalid licese fo Nios® V Pocesso fo Itel® FPGA i the Quatus® Pime Po Editio softwae vesio 24.1? i the Itel® FPGA Kowledge Base. |