F-Tile JESD204B Intel® FPGA IP Release Notes

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ID 723454
Date 4/05/2024
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Document Table of Contents x
1. F-Tile JESD204B Intel® FPGA IP Release Notes 2. F-Tile JESD204B Intel FPGA IP User Guide Archives
1. F-Tile JESD204B Intel® FPGA IP Release Notes x
1.1. F-Tile JESD204B Intel® FPGA IP v2.2.0 1.2. F-Tile JESD204B Intel® FPGA IP v2.1.0 1.3. F-Tile JESD204B Intel® FPGA IP v1.1.0 1.4. F-Tile JESD204B Intel® FPGA IP v1.0.0
1. F-Tile JESD204B Intel® FPGA IP Release Notes
2. F-Tile JESD204B Intel FPGA IP User Guide Archives

1.1. F-Tile JESD204B Intel® FPGA IP v2.2.0

Table 1.  v2.2.0 2023.10.02
Quartus® Prime Version Description Impact
23.3 Added Riviera-PRO* simulator support. Regenerate your IP to use the new features.
Added analog parameter panel feature. User can set the analog parameters through the Analog Parameters tab in the parameter editor instead of in QSF.
Level Two Title