F-Tile JESD204B Intel® FPGA IP Release Notes

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ID 723454
Date 4/05/2024
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Document Table of Contents x
1. F-Tile JESD204B Intel® FPGA IP Release Notes 2. F-Tile JESD204B Intel FPGA IP User Guide Archives
1. F-Tile JESD204B Intel® FPGA IP Release Notes x
1.1. F-Tile JESD204B Intel® FPGA IP v2.2.0 1.2. F-Tile JESD204B Intel® FPGA IP v2.1.0 1.3. F-Tile JESD204B Intel® FPGA IP v1.1.0 1.4. F-Tile JESD204B Intel® FPGA IP v1.0.0
1. F-Tile JESD204B Intel® FPGA IP Release Notes
2. F-Tile JESD204B Intel FPGA IP User Guide Archives

1. F-Tile JESD204B Intel® FPGA IP Release Notes

If a release note is not available for a specific IP version, the IP has no changes in that version. For information on IP update releases up to v18.1, refer to the Quartus® Prime Design Suite Update Release Notes.

Intel® FPGA IP versions match the Quartus® Prime Design Suite software versions until v19.1. Starting in Quartus® Prime Design Suite software version 19.2, Intel® FPGA IP has a new versioning scheme.

The Intel® FPGA IP version (X.Y.Z) number can change with each Quartus® Prime software version. A change in:

  • X indicates a major revision of the IP. If you update the Quartus® Prime software, you must regenerate the IP.
  • Y indicates the IP includes new features. Regenerate your IP to include these new features.
  • Z indicates the IP includes minor changes. Regenerate your IP to include these changes.

Section Content
F-Tile JESD204B Intel FPGA IP v2.2.0
F-Tile JESD204B Intel FPGA IP v2.1.0
F-Tile JESD204B Intel FPGA IP v1.1.0
F-Tile JESD204B Intel FPGA IP v1.0.0

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