AN 964: Signal Tap Tutorial for Intel® Agilex™ Partial Reconfiguration Design

ID 710463
Date 2/25/2022
Public

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2.7. Step 7: Performing Data Acquisition

After loading the appropriate .rbf onto the board, start data acquisition on the Signal Tap logic analyzer.

To perform data acquisition:

  1. Make sure that the Signal Tap Logic Analyzer loads the .stp file in the current active revision.
  2. In the top right corner of the Signal Tap window, set up the JTAG connection to the board with the following options:
    Option Description
    Hardware USB-BlasterII
    Device AGFB014
    Bridge Index 0

    Bridge index is set to 0 for tapping signals in the PR region.

    Figure 26. JTAG Configuration
  3. On the Signal Tap toolbar, click Run Analysis .
    The analysis may take a few minutes.
    When the analysis finishes, the Signal Tap Logic Analyzer loads the waveforms to the window.
The following section displays the resultant waveforms for all PR configurations.