Visible to Intel only — GUID: rrb1647372762819
Ixiasoft
1.1. F-Tile CPRI PHY Intel® FPGA IP v4.3.3
1.2. F-Tile CPRI PHY Intel® FPGA IP v4.3.1
1.3. F-Tile CPRI PHY Intel® FPGA IP v4.3.0
1.4. F-Tile CPRI PHY Intel® FPGA IP v4.0.0
1.5. F-Tile CPRI PHY Intel® FPGA IP v3.3.0
1.6. F-Tile CPRI PHY Intel® FPGA IP v3.2.0
1.7. F-Tile CPRI PHY Intel® FPGA IP v3.1.0
1.8. F-Tile CPRI PHY Intel® FPGA IP v3.0.0
1.9. F-Tile CPRI PHY Intel® FPGA IP v2.0.0
1.10. F-Tile CPRI PHY Intel FPGA IP User Guide Archives
1.11. F-Tile CPRI PHY Intel® FPGA IP Design Example User Guide Archives
Visible to Intel only — GUID: rrb1647372762819
Ixiasoft
1.6. F-Tile CPRI PHY Intel® FPGA IP v3.2.0
Quartus® Prime Pro Edition Version | Description | Impact |
---|---|---|
22.1 | Removed support for ModelSim* SE simulator. | — |
Added new parameter: Enable CDR Clock Output. | — |