F-Tile Architecture and PMA and FEC Direct PHY IP User Guide

ID 683872
Date 4/07/2025
Public

Visible to Intel only — GUID: grq1657734386886

Ixiasoft

Document Table of Contents

A.5.7.3. F-Tile FGT Attribute Access Sequence

The following tables describe the various FGT attribute access sequences required for FGT tuning.
Table 139.  FGT Attribute Access Sequence for FOM, VGA, CTLE
Opcode Field[7:0] Data Field[31:16] Description Address 58 Transaction Type Value (32-bit)
0x94 0x6000 FOM 0x9003C Write 0x60008094
0x90040 Read 0x60008094
0x9003C Write 0x60000094
0x90040 Read 0x60000094
0x94 0x4000 VGA 0x9003C Write 0x40008094
0x90040 Read 0x40008094
0x9003C Write 0x40000094
0x90040 Read 0x40000094
0x94 0x4001 CTLE 0x9003C Write 0x40018094
0x90040 Read 0x40018094
0x9003C Write 0x40010094
0x90040 Read 0x40010094
Table 140.  FGT Attribute Access Sequence for BER Measurement
Opcode Field[7:0] Data Field[31:16] Description Address58 Transaction Type Value (32-bit)
0xD 0x0 Poll for RX READY 0x9003C Write 0x800D
0x90040 Read 0x1800D 59
0x9003C Write 0x000D
0x90040 Read 0x000D
0x41 0x30C

Set PRBS pattern31 60

0x9003C Write 0x30CA041
0x90040 Read 0x30CA041
0x9003C Write 0x30CA041
0x90040 Read 0x30C2041
0x45 0x14 Set up BER test 0x9003C Write 0x14A045
0x90040 Read 0x14A045
0x9003C Write 0x142045
0x90040 Read 0x142045
0x0F 0x20 Start test 0x9003C Write 0x20A00F
0x90040 Read 0x20A00F
0x9003C Write 0x20200F
0x90040 Read 0x20200F
0x49 0x0 Check test status (GET) 0x9003C Write 0x8049
0x90040 Read 0x1008049 (test running)
0x9003C Write 0x0049
0x90040 Read 0x0049
0x0F 0x21 Stop test 0x9003C Write 0x21A00F
0x90040 Read 0x21A00F
0x9003C Write 0x21200F
0x90040 Read 0x21200F
0x49 0x0 Check test complete with success 0x9003C Write 0x8049
0x90040 Read 0x3008049 (complete with success)
0x9003C Write 0x00049
0x90040 Read 0x00049
0x4A 0x0 Get test results for LSB 12 bits 0x9003C Write 0x0000804A
0x90040 Read 0x(Read 12bits)804A
0x9003C Write 0x0000004A
0x90040 Read 0x0000004A
0x4B 0x0 Get test results for middle 16 bits 0x9003C Write 0x0000804B
0x90040 Read 0x(Read 16bits)804B
0x9003C Write 0x0000004B
0x90040 Read 0x0000004B
0X4C 0x0 Get test results for MSB 4 bits 0x9003C Write 0x0000804C
0x90040 Read 0x(Read 4bits)804C
0x9003C Write 0x0000004C
0x90040 Read 0x0000004C
Table 141.  FGT Attribute Access Sequence for Eye Height Measurement
Opcode Field[7:0] Data Field[31:16] Description Address58 Transaction Type Value (32-bit)
0xD 0x0 Poll for RX READY 0x9003C Write 0x0000800D
0x90040 Read 0x0001800D 61
0x9003C Write 0x0000000D
0x90040 Read 0x0000000D
0x45 0x7 EHM test 0x9003C Write 0x007A045
0x90040 Read 0x007A045
0x9003C Write 0x0072045
0x90040 Read 0x0072045
0x91 0x5 Clear previous configuration 0x9003C Write 0x0005A091
0x90040 Read 0x0005A091
0x9003C Write 0x00052091
0x90040 Read 0x00052091
0x48

0xDB

0xC9

0xFF

0xED

Refer to ttk_helper_ftile.tcl

Set basic measurement configuration 0x9003C Write 0x(varies)A04862
0x90040 Read 0x(varies)A04862
0x9003C Write 0x(varies)204862
0x90040 Read 0x(varies)204862
0x48

0xC6F

0xF391 for BER = 1E-6

Refer to ttk_helper_ftile.tcl

Set event rate lsb1 0x9003C Write 0x(varies)A048
0x90040 Read 0x(varies)A04862
0x9003C Write 0x(varies)204862
0x90040 Read 0x(varies)204862
0x48

0x1

0xFFFE for BER = 1E-6

Refer to ttk_helper_ftile.tcl

Set event rate lsb2 0x9003C Write 0x(varies)A04862
0x90040 Read 0x(varies)A04862
0x9003C Write 0x(varies)204862
0x90040 Read 0x(varies)204862
0x48

0x100

0xFF for BER = 1E-6

Refer to ttk_helper_ftile.tcl

Set event rate msb 0x9003C Write 0x(varies)A04862
0x90040 Read 0x(varies)A04862
0x9003C Write 0x(varies)204862
0x90040 Read 0x(varies)204862
0xF 0x20 Start test 0x9003C Write 0x20A00F
0x90040 Read 0x20A00F
0x9003C Write 0x20200F
0x90040 Read 0x20200F
0x49 0x0 Check test complete with success 0x9003C Write 0x00008049
0x90040 Read

0x03008049

(complete with success)

0x9003C Write 0x00000049
0x90040 Read 0x00000049
0x0F 0x21 Stop test 0x9003C Write 0x0021A00F
0x90040 Read 0x0021A00F
0x9003C Write 0x0021200F
0x90040 Read 0x0021200F
0x4A 0x0

Get test results

LSB 12bits

0x9003C Write 0x0000804A
0x90040 Read 0x(Read12bits)804A
0x9003C Write 0x0000004A
0x90040 Read 0x0000004A
Table 142.  FGT Attribute Access Sequence for VSR High Loss Between and Low Loss
Opcode Field[7:0] Data Field[31:16] Description Address58 Transaction Type Value (32-bit)
0x64 0x15 Set to VSR High Loss 0x9003C Write 0x15A064
0x90040 Read 0x15A064
0x9003C Write 0x152064
0x90040 Read 0x152064
0x64 0x14 Set to VSR Low Loss 0x9003C Write 0x14A064
0x90040 Read 0x14A064
0x9003C Write 0x142064
0x90040 Read 0x142064
0x64 0x10 Set to SR/MR/LR (default) 0x9003C Write 0x00A064
0x90040 Read 0x00A064
0x9003C Write 0x002064
0x90040 Read 0x002064
58 Registers are for channel 0. Refer to FGT Attribute Access Method for other channels.
59
  • Physical lane 0: 0x0001800D
  • Physical lane 1: 0x0002800D
  • Physical lane 2: 0x0004800D
  • Physical lane 3: 0x0008800D
60 For other PRBS patterns refer to the FGT Attribute Access Method section.
61
  • Physical lane 0: 0x0001800D
  • Physical lane 1: 0x0002800D
  • Physical lane 2: 0x0004800D
  • Physical lane 3: 0x0008800D
62 Varies based on BER settings. Refer to ttk_helper_ftile.tcl.