Intel® FPGA SDK for OpenCL™ Pro Edition: Programming Guide

ID 683846
Date 10/04/2021
Public

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Document Table of Contents

5.1. Guidelines for Naming the Kernel

Intel® recommends that you include only alphanumeric characters in your file names.
  • Begin a file name with an alphanumeric character.
    If the file name of your OpenCL™ application begins with a nonalphanumeric character, compilation fails with the following error message:
    Error: Quartus compilation FAILED
    See quartus_sh_compile.log for the output log.
  • Ensure that the kernel file name only contains alphanumeric character, dash, underscore, or dot.
    The Intel® FPGA SDK for OpenCL™ application only accepts file name containing alphanumeric character, dash, underscore, or dot. File name having other characters is treated as an invalid file name and triggers the following compilation error message:
    aoc foo\*1.cl 
    Error: File: foo*1.cl contains invalid characters.
    Ensure the file name only contains alphanumeric characters, dash, underscore or dot.
    
  • For Windows systems, ensure that the combined length of the kernel file name and its file path does not exceed 260 characters.
    64-bit Windows 7 and Windows 8.1 have a 260-character limit on the length of a file path. If the combined length of the kernel file name and its file path exceeds 260 characters, the offline compiler generates the following error message:
    The filename or extension is too long.
    The system cannot find the path specified.

    In addition to the compiler error message, the following error message appears in the <your_kernel_filename>/quartus_sh_compile.log file:

    Error: Can’t copy <file_type> files: Can’t open 
    <your_kernel_filename> for write: No such file or directory

    For Windows 10, you can remove the 260-character limit. For more information, see your Windows 10 documentation.

  • Do not name your .cl OpenCL kernel source file "kernel", "Verilog", or "VHDL" as they are reserved keywords.
    Naming the source file kernel.cl, Verilog.cl, or VHDL.cl causes the offline compiler to generate intermediate design files that have the same names as certain internal files, which leads to a compilation error.