Visible to Intel only — GUID: mwh1410384605680
Ixiasoft
Visible to Intel only — GUID: mwh1410384605680
Ixiasoft
2.4.6. Defining Trigger Conditions
The Signal Tap logic analyzer allows you to define trigger conditions that range from very simple, such as the rising edge of a single signal, to very complex, involving groups of signals, extra logic, and multiple conditions. Additionally, you can specify Power-Up Triggers to capture data from trigger events occurring immediately after the device enters user-mode after configuration.
Section Content
Basic Trigger Conditions
Nested Trigger Conditions
Comparison Trigger Conditions
Advanced Trigger Conditions
Custom Trigger HDL Object
Specify Trigger Position
Power-Up Triggers
External Triggers
Trigger Condition Flow Control
Sequential Triggering
State-Based Triggering
Trigger Lock Mode