Visible to Intel only — GUID: mwh1410471161385
Ixiasoft
Visible to Intel only — GUID: mwh1410471161385
Ixiasoft
4.5.1. Creating Symbols
You can create symbols for the Cadence Allegro Design Entry HDL project with the Cadence Allegro PCB Librarian Part Developer tool, which is available in the Cadence Allegro Project Manager tool. Intel recommends using the Cadence Allegro PCB Librarian Part Developer tool to import FPGA designs into the Cadence Allegro Design Entry HDL software.
You must obtain a PCB Librarian Expert license from Cadence to run the Cadence Allegro PCB Librarian Part Developer tool. The Cadence Allegro PCB Librarian Part Developer tool provides a GUI with many options for creating, editing, fracturing, and updating symbols. If you do not use the Cadence Allegro PCB Librarian Part Developer tool, you must create and edit symbols manually in the Symbol Schematic View in the Cadence Allegro Design Entry HDL software.
Before creating a symbol from an FPGA design, you must open a Cadence Allegro Design Entry HDL project with the Cadence Allegro Project Manager tool. If you do not have an existing Cadence Allegro Design Entry HDL project, you can create one with the Cadence Allegro Design Entry HDL software. The Cadence Allegro Design Entry HDL project directory with the name <project name> .cpm contains your Cadence Allegro Design Entry HDL projects.
While the Cadence Allegro PCB Librarian Part Developer tool refers to symbol fractures as slots, the other tools use different names to refer to symbol fractures.
Cadence Allegro PCB Librarian Part Developer Tool | Cadence Allegro Design Entry HDL Software | Cadence Allegro Design Entry CIS Software | |
---|---|---|---|
During symbol generation | Slots | — | Sections |
During symbol schematic instantiation | — | Versions | Parts |