1.2. Intel® Arria® 10 Native Floating-Point DSP Intel® FPGA IP Parameters
Parameter | Value | Default Value | Description |
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DSP Template | Multiply Add Multiply Add Multiply Accumulate Vector Mode 1 Vector Mode 2 |
Multiply | Select the desired operational mode for the DSP block. The selected operation is reflected in the DSP Block View. |
View | Register Enables Register Clears |
Register Enables | Options to select clocking scheme or reset scheme for registers view. The selected operation is reflected in the DSP Block View. Select Register Enables for DSP Block View to show registers clocking scheme. You can change the clocks for each of the registers in this view. Select Register Clears for DSP Block View to show registers reset scheme. Turn on Use Single Clear to change the registers reset scheme. |
Use Single Clear | On or off | Off | Turn on this parameter if you want a single reset to reset all the registers in the DSP block. Turn off this parameter to use different reset ports to reset the registers. Turn on for clear 0 on output register; turn off for clear 1 on output register. Clear 0 for input registers uses aclr[0] signal. Clear 1 for output and pipeline registers uses aclr[1] signal. All input registers use aclr[0] reset signal. All output and pipeline registers use aclr[1] reset signal. |
DSP View Block. | |||
Chain In Multiplexer (14) | Enable Disable |
Disable | Click on the multiplexer to enable chainin port. |
Chain Out Multiplexer (12) | Disable Enable |
Disable | Click on the multiplexer to enable chainout port. |
Adder (13) | + - |
+ | Click on the Adder symbol to select addition or subtraction mode. |
Register Clock
|
None Clock 0 Clock 1 Clock 2 |
Clock 0 | To bypass any register, toggle the register clock to None.
Toggle the register clock to:
You can only change these settings when you select Register Enables in View parameter. |
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DSP Templates | Description |
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Multiply | Performs single precision multiplication operation and applies the following equation:
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Add | Performs single precision addition or subtraction operation and applies the following equations:.
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Multiply Add | This mode performs single precision multiplication, followed by addition or subtraction operations and applies the following equations.
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Multiply Accumulate | Performs floating-point multiplication followed by floating-point addition or subtraction with the previous multiplication result and applies the following equations:
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Vector Mode 1 | Performs floating-point multiplication followed by floating-point addition or subtraction with the chainin input from the previous variable DSP block and applies the following equations:.
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Vector Mode 2 | Performs floating-point multiplication where the IP core feeds the multiplication result is directly to chainout. The IP core then adds or subtracts the chainin input from the previous variable DSP block from input Ax as the output result. This mode applies the following equations:
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