2.4. PLDM Topology and Hierarchy
Defined Platform Descriptor Records
The Intel® FPGA PAC N3000 uses 20 Platform Descriptor Records (PDRs). Intel® MAX® 10 BMC only supports consolidated PDRs where the PDRs will not be added or removed dynamically when QSFP is plugged and unplugged. When unplugged the sensor operational status will simply be reported as unavailable.
Sensor Names and Record Handle
All PDRs are assigned an opaque numeric value called the Record Handle. This value is used for accessing individual PDRs within the PDR Repository via GetPDR (DTMF specification DSP0248).
The following table is a consolidated list of sensors monitored on Intel® FPGA PAC N3000.
| Function | Sensor Name | Sensor Information | PLDM | ||
|---|---|---|---|---|---|
| Sensor Reading Source (Component) | PDR Record Handle | Thresholds in PDR | Threshold changes allowed via PLDM | ||
| Total Intel® FPGA PAC input power | Board Power | Calculate from PCIe fingers 12V Current and Voltage | 1 | 0 | No |
| PCIe* fingers 12 V Current | 12 V Backplane Current | PAC1932 SENSE1 | 2 | 0 | No |
| PCIe* fingers 12 V Voltage | 12 V Backplane Voltage | PAC1932 SENSE1 | 3 | 0 | No |
| 1.2 V Rail Voltage | 1.2 V Voltage | MAX10 ADC | 4 | 0 | No |
| 1.8 V Rail Voltage | 1.8 V Voltage | MAX 10 ADC | 6 | 0 | No |
| 3.3 V Rail Voltage | 3.3 V Voltage | MAX 10 ADC | 8 | 0 | No |
| FPGA Core Voltage | FPGA Core Voltage | LTC3884 (U44) | 10 | 0 | No |
| FPGA Core Current | FPGA Core Current | LTC3884 (U44) | 11 | 0 | No |
| FPGA Core Temperature | FPGA Core Temperature | FPGA temp diode via TMP411 | 12 | Upper Warning: 90 Upper Fatal: 100 |
Yes |
| Board Temperature | Board Temperature | TMP411 (U65) | 13 | Upper Warning: 75 Upper Fatal: 85 |
Yes |
| QSFP0 Voltage | QSFP0 Voltage | External QSFP module (J4) |
14 | 0 | No |
| QSFP0 Temperature | QSFP0 Temperature | External QSFP module (J4) |
15 | Upper Warning: Value set by QSFP Vendor Upper Fatal: Value set by QSFP Vendor |
No |
| PCIe Auxiliary 12V Current | 12 V AUX | PAC1932 SENSE2 | 24 | 0 | No |
| PCIe Auxiliary 12V Voltage | 12 V AUX Voltage | PAC1932 SENSE2 | 25 | 0 | No |
| QSFP1 Voltage | QSFP1 Voltage | External QSFP module (J5) | 37 | 0 | No |
| QSFP1 Temperature | QSFP1 Temperature | External QSFP module (J5) | 38 | Upper Warning: Value set by QSFP Vendor Upper Fatal: Value set by QSFP Vendor |
No |
| PKVL A Core Temperature | PKVL A Core Temperature | PKVL chip (88EC055) (U18A) | 44 | 0 | No |
| PKVL A Serdes Temperature | PKVL A Serdes Temperature | PKVL chip (88EC055) (U18A) | 45 | 0 | No |
| PKVL B Core Temperature | PKVL B Core Temperature | PKVL chip (88EC055) (U23A) | 46 | 0 | No |
| PKVL B Serdes Temperature | PKVL B Serdes Temperature | PKVL chip (88EC055) (U23A) | 47 | 0 | No |
Note: The Upper Warning and Upper Fatal values for QSFP are set by the QSFP vendor. Refer to vendor datasheet for the values. The BMC will read these threshold values and report them out.
fpgad is a service that can help you protect the server from crashing when the hardware reaches an upper non-recoverable or lower non-recoverable sensor threshold (also called as fatal threshold).
fpgad is capable of monitoring each of the 20 sensors reported by the Board Management Controller.
Please refer to the Graceful Shutdown topic from Intel Acceleration Stack User Guide: Intel FPGA Programmable Acceleration Card N3000 for more information.
Note: Qualified OEM server systems should provide the required cooling for your workloads.
You can obtain the values of the sensors by running the following OPAE command as root or sudo:
$ sudo fpgainfo bmc