1.14. Latest Known Intel® Quartus® Prime Software Issues
For the latest information about issues that affect Intel® Quartus® Prime Pro Edition Version 23.3, review the Intel FPGA Knowledge Base articles that apply to Intel® Quartus® Prime Pro Edition Version 23.3 .
Description | Workaround |
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You might encounter bit errors on the TX side of your F-Tile PMA/FEC Direct PHY Intel® FPGA IP variant when configured for 100G-4 PMA Direct mode on FGT transceivers if the variant is physically placed on the F-tile so that it is using the 200G Hard IP of the F-tile. This problem does not happen on the 100G-4 FEC direct variant or any other variants regardless of rate or mode |
For details and a workaround, refer to Why do I see bit errors on the TX side of my F-Tile PMA/FEC Direct PHY Intel® FPGA IP variant when configured for 100G-4 PMA Direct mode on FGT transceivers? in the Intel® FPGA Knowledge Base. |
For Cadence* Xcelium* Parallel Logic Simulation and Synopsys* VCS* simulation software, some F-Tile Intel FPGA IPs might throw elaboration-time errors. | For details and a workaround, refer to Why do I see elaboration errors on Xcelium* and Synopsys* VCS* simulators with Intel® FPGA F-tile IP's? in the Intel® FPGA Knowledge Base. |
You can find known issue information for previous versions of the Quartus® Prime software on the Intel FPGA Knowledge Base web page.
Information about known software issues that affect previous versions of the Quartus® II software is available on the Intel® Quartus® Prime and Quartus II Software Support web page.
Information about issues affecting the Intel® FPGA IP Library is available in the release notes for each IP. You can find the IP release notes on the Intel® FPGA Documentation Index web page.