Visible to Intel only — GUID: bwp1488319317724
Ixiasoft
System Specification
Device Selection
Early System and Board Planning
Pin Connection Considerations for Board Design
I/O and Clock Planning
Design Entry
Design Implementation, Analysis, Optimization, and Verification
Design Checklist
Appendix: Cyclone® 10 GX Transceiver Design Guidelines
Conclusion
Document Revision History
Visible to Intel only — GUID: bwp1488319317724
Ixiasoft
Early System and Board Planning
System information related to the FPGA should be planned early in the design process, before designers have completed the design in the Intel® Quartus® Prime software. Early planning allows the FPGA team to provide early information to PCB board and system designers.