1.2. HDMI Intel® FPGA IP Board Design Tips
When you are designing your HDMI Intel® FPGA IP system, consider the following board design tips.
- Use no more than two vias per trace and avoid via stubs
- Match the differential pair impedance to the impedance of the connector and cable assembly (100 ohm ±10%)
- Minimize inter-pair and intra-pair skew to meet the TMDS signal skew requirement
- Avoid routing a differential pair over a gap in the underneath plane
- Use standard high speed PCB design practices
- Use level shifters to meet electrical compliance at both TX and RX
- Use robust cables, such as Cat2 cable for HDMI 2.0