Visible to Intel only — GUID: sxa1488853883535
Ixiasoft
Visible to Intel only — GUID: sxa1488853883535
Ixiasoft
6.3.2.4. Defining Empty Logic Lock Regions
Empty Logic Lock regions can be useful for the following scenarios:
- Preliminary floorplanning
- Complex incremental builds, such as root partition reuse
- Team based design and interconnect logic
- Confining logic placements
Since Logic Lock regions do not reserve any routing resources by default, the Fitter may use the reserved area for routing purposes.
Use the Core Only attribute for empty Logic Lock regions. When you include periphery resources in empty regions, you restrict the periphery component placement, which can result in a no fit design. After you name the empty region, you can perform the same manipulations as with any Logic Lock region that includes members.