Intel® Acceleration Stack for Intel® Xeon® CPU with FPGAs Version 2.0 Release Notes: For the Intel FPGA Programmable Acceleration Card D5005

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Date 8/05/2019
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Notice Intel® Acceleration Stack for Intel® Xeon® CPU with FPGAs Version 2.0 Release Notes for the Intel® FPGA PAC D5005
Intel® Acceleration Stack for Intel® Xeon® CPU with FPGAs Version 2.0 Release Notes for the Intel® FPGA PAC D5005 x
Acceleration Acronym List Minimum Requirements Intel® Acceleration Stack Reference Table Intel® Acceleration Stack v2.0 Features Known Issues for the Intel® Acceleration Stack v2.0 Known Issues for the Intel® Acceleration Stack v2.0 AFU Design Examples Revision History for the Intel® Acceleration Stack for Intel® Xeon® CPU with FPGAs v2.0 Production Release Notes
Notice
Intel® Acceleration Stack for Intel® Xeon® CPU with FPGAs Version 2.0 Release Notes for the Intel® FPGA PAC D5005

Notice

Updated for:
Intel® Acceleration Stack for Intel® Xeon® CPU with FPGAs 2.0

Please note that the Intel® Acceleration Stack for Intel® Xeon® CPU with FPGAs DOES NOT include mitigations for the exploits known as Spectre (CVE-2017-5753, CVE-2017-5715) and Meltdown (CVE-2017-5754). These exploits require that malware runs locally on the system, which is not normally possible in a closed environment where the system’s software is centrally controlled. Intel does not recommend that an un-mitigated version of the Intel® Acceleration Stack for Intel® Xeon® CPU with FPGAs be used in an environment that is not a closed system environment.

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