| Updated for: |
|---|
| Intel® Acceleration Stack for Intel® Xeon® CPU with FPGAs 1.2 |
| Issue | Affected Versions | Planned Fix |
|---|---|---|
| Flash Fallback Does Not Meet PCIe Timeout | Acceleration Stack versions 1.0, 1.1 and 1.2 | No Planned Fix |
| Unsupported Transaction Layer Packet Types | Acceleration Stack versions 1.0, 1.1 and 1.2 | No Planned Fix |
| fpgainfo errors -c Does Not Clear the Error Response When Non-Fatal Errors Occur | Acceleration Stack version 1.2 | No Planned Fix |
| Board management controller does not verify the CRC in a PLDM request. | Acceleration Stack version 1.2 | No Planned Fix |
| The 1.2 V current and 1.8 V voltage upper non-recoverable (UNR) limits for the board management controller and the pacd are set to the same value. | Acceleration Stack version 1.2 | No Planned Fix |
The table below can be used as a reference to identify the FPGA Interface Manager (FIM), Open Programmable Acceleration Engine (OPAE) and Intel® Quartus® Prime Pro Edition version that corresponds to your software stack release.
| Intel® Acceleration Stack Version | Platform | FPGA Interface Manager (FIM) Version: Partial Reconfiguration (PR) Interface ID | Open Programmable Acceleration Engine (OPAE) Version | Intel® Quartus® Prime Pro Edition |
|---|---|---|---|---|
| 1.2 | Intel® PAC with Intel® Arria® 10 GX FPGA | 69528db6-eb31-577a-8c36-68f9faa081f6 |
1.1.2 | 17.1.1 |
| 1.1 | Intel® PAC with Intel® Arria® 10 GX FPGA | 9926ab6d-6c92-5a68-aabc-a7d84c545738 | 1.0.2 | 17.1.1 |
| 1.0 | Intel® PAC with Intel® Arria® 10 GX FPGA | ce489693-98f0-5f33-946d-560708be108a | 0.13.1 | 17.0.0 |