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1.1. Release Information
1.2. Device Family Support
1.3. Signals
1.4. Parameters
1.5. Register Map
1.6. Using Generic Serial Flash Interface Intel® FPGA IP
1.7. Generic Serial Flash Interface Intel® FPGA IP Reference Design
1.8. Flash Access Using the Generic Serial Flash Interface Intel® FPGA IP
1.9. Intel HAL Driver
1.10. Generic Serial Flash Interface Intel® FPGA IP User Guide Archives
1.11. Document Revision History for the Generic Serial Flash Interface Intel® FPGA IP User Guide
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1.7. Generic Serial Flash Interface Intel® FPGA IP Reference Design
The reference design implements the Generic Serial Flash Interface Intel® FPGA IP to perform the following general-purpose memory operations:
- Read device ID
- Enable sector protect
- Perform sector erase
- Read and write data from and to flash devices