Low Latency 100-Gbps Ethernet IP Core Release Notes

Download PDF
ID 683392
Date 7/07/2017
Public
Document Table of Contents
Document Table of Contents x
1. Low Latency 100-Gbps Ethernet IP Core Release Notes
1. Low Latency 100-Gbps Ethernet IP Core Release Notes x
1.1. Low Latency 100-Gbps Ethernet IP Core v16.1
1. Low Latency 100-Gbps Ethernet IP Core Release Notes

1.1. Low Latency 100-Gbps Ethernet IP Core v16.1

Table 1.  Version 16.1 October 2016
Description Impact Notes
Enhanced malformed packet handling.

The IP core now ignores standard flow control pause packets if they are runt packets or have FCS errors. This change does not affect the IP core's handling of priority-based flow control packets.

The IP core potentially exhibits a behavior change. If you turn on standard flow control, the IP core might not process some incoming pause packets that it would previously have processed. The IP core continues to forward or drop these packets according to the setting in the RX_PAUSE_FWD register at offset 0x706. Change required for UNH compliance.
Added Reed-Solomon forward error correction (RS-FEC) option Enable RX-FEC for CAUI4 for CAUI-4 variations. If you turn on the new parameter, the IP core implements RS-FEC as defined in IEEE 802.3bj-2014 clause 91. New feature.
Related Information
Level Two Title