Intel® Quartus® Prime Standard Edition User Guide: Platform Designer

ID 683364
Date 12/15/2018
Public
Document Table of Contents

3.2. Avalon® Streaming Interfaces

High bandwidth components with streaming data typically use Avalon® -ST interfaces for the high throughput datapath. Streaming interfaces can also use memory-mapped connection interfaces to provide an access point for control. In contrast to the memory-mapped interconnect, the Avalon® -ST interconnect always creates a point-to-point connection between a single data source and data sink.
Figure 96. Memory-Mapped and Avalon® -ST Interfaces

In this example, there are the following connection pairs:

  • Data source in the Rx Interface transfers data to the data sink in the FIFO.
  • Data source in the FIFO transfers data to the Tx Interface data sink.

The memory-mapped interface allows a processor to access the data source, FIFO, or data sink to provide system control. If your source and sink interfaces have different formats, for example, a 32-bit source and an 8-bit sink, Platform Designer automatically inserts the necessary adapters. You can view the adapters on the System View tab by clicking System > Show System with Platform Designer Interconnect.

Figure 97.  Avalon® -ST Connection Between the Source and SinkThis source-sink pair includes only the data signal. The sink must be able to receive data as soon as the source interface comes out of reset.
Figure 98.  Signals Indicating the Start and End of Packets, Channel Numbers, Error Conditions, and BackpressureAll data transfers using Avalon® -ST interconnect occur synchronously on the rising edge of the associated clock interface. Throughput and frequency of a system depends on the components and how they are connected.

The IP Catalog includes Avalon® -ST components that you can use to create datapaths, including datapaths whose input and output streams have different properties. Generated systems that include memory-mapped master and slave components may also use these Avalon® -ST components because Platform Designer generation creates interconnect with a structure similar to a network topology, as described in Platform Designer Transformations. The following sections introduce the Avalon® -ST components.