Intel® Quartus® Prime Standard Edition User Guide: Platform Designer

ID 683364
Date 12/15/2018
Public
Document Table of Contents

1.15. Integrating a Platform Designer System with the Intel® Quartus® Prime Software

To integrate a Platform Designer system with your Intel® Quartus® Prime project, you must add either the Platform Designer System File (.qsys) or the Intel® Quartus® Prime IP File (.qip), but never both to your Intel® Quartus® Prime project. Platform Designer creates the .qsys file when you save your Platform Designer system, and produces the .qip file when you generate your Platform Designer system. Both the .qsys and .qip files contain the information necessary for compiling your Platform Designer system within a Intel® Quartus® Prime project.

You can choose to include the .qsys file automatically in your Intel® Quartus® Prime project when you generate your Platform Designer system by turning on the Automatically add Intel® Quartus® Prime IP files to all projects option in the Intel® Quartus® Prime software (Tools > Options > IP Settings). If this option is turned off, the Intel® Quartus® Prime software asks you if you want to include the .qsys file in your Intel® Quartus® Prime project after you exit Platform Designer.

If you want file generation to occur as part of the Intel® Quartus® Prime software's compilation, you should include the .qsys file in your Intel® Quartus® Prime project. If you want to manually control file generation outside of the Intel® Quartus® Prime software, you should include the .qip file in your Intel® Quartus® Prime project.

Note: The Intel® Quartus® Prime software generates an error message during compilation if you add both the .qsys and .qip files to your Intel® Quartus® Prime project.

Does Intel® Quartus® Prime Overwrite Platform Designer-Generated Files During Compilation?

Platform Designer supports standard and legacy device generation. Standard device generation refers to generating files for the Intel® Arria® 10 device, and later device families. Legacy device generation refers to generating files for device families prior to the release of the Intel® Arria® 10 device, including MAX 10 devices.

When you integrate your Platform Designer system with the Intel® Quartus® Prime software, if a .qsys file is included as a source file, Platform Designer generates standard device files under <system>/ next to the location of the .qsys file. For legacy devices, if a .qsys file is included as a source file, Platform Designer generates HDL files in the Intel® Quartus® Prime project directory under /db/ip.

For standard devices, Platform Designer-generated files are only overwritten during Intel® Quartus® Prime compilation if the .qip file is removed or missing. For legacy devices, each time you compile your Intel® Quartus® Prime project with a .qsys file, the Platform Designer-generated files are overwritten. Therefore, you should not edit Platform Designer-generated HDL in the /db/ip directory; any edits made to these files are lost and never used as input to the Quartus HDL synthesis engine.