Visible to Intel only — GUID: mwh1409959108570
Ixiasoft
Visible to Intel only — GUID: mwh1409959108570
Ixiasoft
2.6.2. Arbitration Shares and Bursts
You can adjust the arbitration process by assigning a larger number of shares to masters that need greater throughput. The larger the arbitration share, the more transfers are allocated to the master to access a slave. The masters gets uninterrupted access to the slave for its number of shares, as long as the master is reading or writing.
If a master cannot post a transfer, and other masters are waiting to gain access to a particular slave, the arbiter grants access to another master. This mechanism prevents a master from wasting arbitration cycles if it cannot post back-to-back transfers. A bursting transaction contains multiple beats (or words) of data, starting from a single address. Bursts allow a master to maintain access to a slave for more than a single word transfer. If a bursting master posts a write transfer with a burst length of eight, it is guaranteed arbitration for eight write cycles.
You can assign arbitration shares to an Avalon® -MM bursting master and AXI masters (which are always considered a bursting master). Each share consists of one burst transaction (such as multi cycle write), and allows a master to complete a number of bursts before arbitration switches to the next master.
Section Content
Differences Between Arbitration Shares and Bursts
Choosing Avalon -MM Interface Types
Avalon -MM Burst Master Example