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Resetting the Chip ID Intel® Stratix® 10 FPGA IP Core
To reset the IP core, you must assert the reset signal for at least ten clock cycles.
Note:
- For Intel® Stratix® 10 devices, do not reset the IP core until at least tCD2UM after full chip initialization. Refer the respective device datasheet for tCD2UM value.
- For IP core instantiation guidelines, you must refer to the Intel® Stratix® 10 Reset Release IP section in the Intel® Stratix® 10 Configuration User Guide.
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