OpenCL* Quick Start User Guide: Intel FPGA Programmable Acceleration Card D5005

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ID 683324
Date 7/21/2020
Public
Document Table of Contents
Document Table of Contents x
1. About this Document 2. Setting Up the Host Machine 3. Running Diagnostics 4. OpenCL* Support for Multi-Card Systems 5. Running Samples 6. Compiling OpenCL* Kernels 7. Intel® FPGA PAC D5005 Security for OpenCL* Applications 8. Document Revision History for OpenCL* Quick Start User Guide
1. About this Document x
1.1. Conventions 1.2. Acceleration Glossary 1.3. Acronyms
2. Setting Up the Host Machine x
2.1. Introduction 2.2. Initializing the Environment for OpenCL* with Intel Acceleration Stack 2.3. Initializing the Intel® Acceleration Stack for OpenCL* in a Virtualized Environment
2.1. Introduction x
2.1.1. Release Content
5. Running Samples x
5.1. Running Hello World 5.2. Running Vector Add
6. Compiling OpenCL* Kernels x
6.1. Checking Timing Results
1. About this Document
2. Setting Up the Host Machine
3. Running Diagnostics
4. OpenCL* Support for Multi-Card Systems
5. Running Samples
6. Compiling OpenCL* Kernels
7. Intel® FPGA PAC D5005 Security for OpenCL* Applications
8. Document Revision History for OpenCL* Quick Start User Guide

5.1. Running Hello World

  1. Extract hello_world example: 
    cd $OPAE_PLATFORM_ROOT/opencl

mkdir exm_opencl_hello_world_x64_linux

cd exm_opencl_hello_world_x64_linux

tar xf ../exm_opencl_hello_world_x64_linux.tgz
  2. Build example: 
    cd hello_world

make
  3. Copy aocx to example bin folder: 
    cp $OPAE_PLATFORM_ROOT/opencl/hello_world.aocx ./bin/
  4. Program the aocx file: 
    aocl program acl0 ./bin/hello_world.aocx
    Note: This step is not necessary for non SR-IOV enabled system as OpenCL* by default performs partial reconfiguration to program the new kernel on FPGA. The aocx file in the release OpenCL* folder is unsigned. If you are using Intel® FPGA PAC features and programming a signed aocx file to the device, ensure that you copy the same file in the bin before running.
  5. Run example: 
    ./bin/host
    Example sample output: 
    Querying platform for info:
==========================
CL_PLATFORM_NAME                         = Intel(R) FPGA SDK for OpenCL(TM)
CL_PLATFORM_VENDOR                       = Intel(R) Corporation
CL_PLATFORM_VERSION                      = OpenCL 1.0 Intel(R) FPGA SDK for OpenCL(TM), Version 19.2

Querying device for info:
========================
CL_DEVICE_NAME                           = pac_s10_dc : Intel PAC Platform (pac_ec00001)
CL_DEVICE_VENDOR                         = Intel Corp
CL_DEVICE_VENDOR_ID                      = 4466
CL_DEVICE_VERSION                        = OpenCL 1.0 Intel(R) FPGA SDK for OpenCL(TM), Version 19.2
CL_DRIVER_VERSION                        = 19.2
CL_DEVICE_ADDRESS_BITS                   = 64
CL_DEVICE_AVAILABLE                      = true
CL_DEVICE_ENDIAN_LITTLE                  = true
CL_DEVICE_GLOBAL_MEM_CACHE_SIZE          = 32768
CL_DEVICE_GLOBAL_MEM_CACHELINE_SIZE      = 0
CL_DEVICE_GLOBAL_MEM_SIZE                = 34359737344
CL_DEVICE_IMAGE_SUPPORT                  = false
CL_DEVICE_LOCAL_MEM_SIZE                 = 16384
CL_DEVICE_MAX_CLOCK_FREQUENCY            = 1000
CL_DEVICE_MAX_COMPUTE_UNITS              = 1
CL_DEVICE_MAX_CONSTANT_ARGS              = 8
CL_DEVICE_MAX_CONSTANT_BUFFER_SIZE       = 8589934336
CL_DEVICE_MAX_WORK_ITEM_DIMENSIONS       = 3
CL_DEVICE_MEM_BASE_ADDR_ALIGN            = 8192
CL_DEVICE_MIN_DATA_TYPE_ALIGN_SIZE       = 1024
CL_DEVICE_PREFERRED_VECTOR_WIDTH_CHAR    = 4
CL_DEVICE_PREFERRED_VECTOR_WIDTH_SHORT   = 2
CL_DEVICE_PREFERRED_VECTOR_WIDTH_INT     = 1
CL_DEVICE_PREFERRED_VECTOR_WIDTH_LONG    = 1
CL_DEVICE_PREFERRED_VECTOR_WIDTH_FLOAT   = 1
CL_DEVICE_PREFERRED_VECTOR_WIDTH_DOUBLE  = 0
Command queue out of order?              = false
Command queue profiling enabled?         = true
Using AOCX: hello_world.aocx

Kernel initialization is complete.
Launching the kernel...

Thread #2: Hello from Altera's OpenCL Compiler!

Kernel execution is complete.
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