AN 821: Interface Planning for Intel® Stratix® 10 FPGAs

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ID 683307
Date 12/15/2017
Public
Document Table of Contents
Document Table of Contents x
1. Interface Planning for Intel® Stratix® 10 FPGAs
1. Interface Planning for Intel® Stratix® 10 FPGAs x
1.1. FPGA_TOP Design Example Overview 1.2. Design Example Files 1.3. Design Example Walkthrough 1.4. Modifying the FPGA_TOP Design Example 1.5. Document Revision History
1.3. Design Example Walkthrough x
1.3.1. Step 1: Project Setup 1.3.2. Step 2: Initialize Interface Planner 1.3.3. Step 3: Update Plan with Project Assignments 1.3.4. Step 4: Plan Periphery Placement 1.3.5. Step 5: Report Placement Data 1.3.6. Step 6: Validate and Export Plan Constraints 1.3.7. Step 7: Apply Plan Constraints
1.3.4. Step 4: Plan Periphery Placement x
1.3.4.1. Plan the External Memory Interface 1.3.4.2. Plan the PCIe* Interface 1.3.4.3. Plan the SerialLite III Interface 1.3.4.4. Plan the Transceiver PHY Interface 1.3.4.5. Complete and Save the Floorplan
1.4. Modifying the FPGA_TOP Design Example x
1.4.1. Modifying the VHDL Generics 1.4.2. Changing the Target FPGA
1. Interface Planning for Intel® Stratix® 10 FPGAs

1.3.6. Step 6: Validate and Export Plan Constraints

You must validate your interface plan before exporting the plan constraints to your project. Validation must confirm that the Fitter can place all remaining unplaced design elements. After validating the interface plan, you can export the constraints and apply the interface plan to an Intel® Quartus® Prime Pro Edition project. When you export the constraints, Interface Planner generates and output Tcl script that you use to apply the constraints to a project.

Follow these steps to validate and export the plan constraints:

  1. On the Flow control, click Validate Plan. The Fitter confirms placement of all remaining unplaced design elements. You must correct any errors before you can export constraints. Interface Planner reports a “success” message when validation is complete.
  2. On the Flow control, click Export Constraints, make any changes to Output file name or Section to export, and then click OK. A message indicates when export is successful.
    Figure 20. Export Constraints
  3. Close Interface Planner and return to your project in the Intel® Quartus® Prime Pro Edition software. You can now add these constraints to a project by sourcing the Tcl script from the command prompt, as the following step describes.
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