AN 821: Interface Planning for Intel® Stratix® 10 FPGAs

ID 683307
Date 12/15/2017
Public

1.3.4.5. Complete and Save the Floorplan

The following figure shows the complete pin allocation for the IP in FPGA_TOP.vhd. You can now save this plan for use in subsequent Interface Planner sessions. Interface Planner saves your plan in Interface Planner Floorplan Format (.plan). You can then load a .plan file in Interface Planner to use the floorplan.
Figure 17. Complete Design Floorplan
  1. To save the floorplan, click Save Floorplan in Interface Planner.
  2. In the Save As dialog box, specify a descriptive name for the .plan file, and then click Save.