JESD204B Intel® Cyclone® 10 GX FPGA IP Design Example User Guide

ID 683298
Date 7/29/2024
Public
Document Table of Contents

1.4. Document Revision History for the JESD204B Intel® Cyclone® 10 GX FPGA IP Design Example User Guide

Document Version Quartus® Prime Version IP Version Changes
2024.07.29 21.3 19.2.0
  • Updated Table: Preset Settings.
2022.09.16 21.3 19.2.0
  • Added Table: Supported JESD204B IP Parameter Configurations (L, M, F Values).
2021.11.01 21.3 19.2.0
  • Updated the JESD204B Intel® Cyclone® 10 GX FPGA IP Design Example Quick Start Guide chapter:
    • Added support for QuestaSim* simulator.
    • Removed references to the NCSim simulator.
  • Updated for latest Intel® branding standards.
2018.05.07 18.0 18.0 Initial release.