Intel® Quartus® Prime Pro Edition Settings File Reference Manual

ID 683296
Date 4/03/2023
Public

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Document Table of Contents

EDA_FLATTEN_BUSES

Flattens all buses when creating the VHDL Output File (.vho). You should turn on this option if your third-party EDA environment does not support buses.

Type

Boolean

Device Support

  • This setting can be used in projects targeting any Intel FPGA device family.

Notes

This assignment is included in the Fitter report.

Syntax

set_global_assignment -name EDA_FLATTEN_BUSES -section_id <section identifier> <value>
set_global_assignment -name EDA_FLATTEN_BUSES -entity <entity name> -section_id <section identifier> <value>

Default Value

Off, requires section identifier