Customizable Flash Programmer User Guide

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ID 683271
Date 4/28/2023
Public
Document Table of Contents
Document Table of Contents x
1. Customizable Flash Programmer Overview 2. Customizable Flash Programmer 3. Implementing the Customizable Flash Programmer 4. Document Revision History for the Customizable Flash Programmer User Guide
1. Customizable Flash Programmer Overview x
1.1. Device Family Support 1.2. Software Support
2. Customizable Flash Programmer x
2.1. Programmer Image 2.2. System Console TCL Script 2.3. Limitations and Restrictions
3. Implementing the Customizable Flash Programmer x
3.1. Generating the Raw Programming Data File (.rpd) from User Design 3.2. Compiling the Programmer Image Project and Generating the .sof File 3.3. Customizing the TCL Script 3.4. Programming the Flash Using the System Console
3.1. Generating the Raw Programming Data File (.rpd) from User Design x
3.1.1. Understanding Quad SPI Flash Byte-Addressing 3.1.2. Understanding Dummy Clock Cycles for Single and Quad IO Fast Read 3.1.3. Generating the .rpd File Using the Convert Programming File Tool
3.1.3. Generating the .rpd File Using the Convert Programming File Tool x
3.1.3.1. Generating .rpd File for Intel® Arria® 10 and Intel® Cyclone® 10 GX Devices 3.1.3.2. Generating .rpd File for Other FPGA Devices
3.2. Compiling the Programmer Image Project and Generating the .sof File x
3.2.1. Configuring the IP Cores Setting 3.2.2. Assigning External Clock Source for the IP Cores 3.2.3. Generating the Programmer Image .sof File from the Reference Project
3.2.1. Configuring the IP Cores Setting x
3.2.1.1. Configuring JTAG to Avalon® Master Bridge IP Core 3.2.1.2. Configuring Intel AvMM Bursting Master IP Core 3.2.1.3. Configuring Generic Serial Flash Interface IP Core
3.3. Customizing the TCL Script x
3.3.1. TCL Script Structures 3.3.2. TCL Script User Setting 3.3.3. Customizing the Programming Flow 3.3.4. Creating Custom Functions
3.4. Programming the Flash Using the System Console x
3.4.1. Executing Commands in the System Console 3.4.2. Executing the System-Console Commands in the Nios® II Command Shell
1. Customizable Flash Programmer Overview
2. Customizable Flash Programmer
3. Implementing the Customizable Flash Programmer
4. Document Revision History for the Customizable Flash Programmer User Guide

3.2.3. Generating the Programmer Image .sof File from the Reference Project

To generate the .sof file, follow these steps:

  1. Open the reference project using the Intel® Quartus® Prime software.
    The reference project is created using the Intel® Quartus® Prime Standard Edition software version 18.0. Intel recommends opening this project using the same version of the Intel® Quartus® Prime software.
  2. Select the target device based on the device used on the board.
  3. Configure the IP core setting in Platform Designer. This step is optional.
  4. Regenerate HDL in the Platform Designer.
  5. Assign the clock pin if you use an external clock as the clock source in your design.
  6. Recompile the project to generate the .sof file.
The generated .sof file is used to configure the FPGA. You may run the TCL script in the System Console to program the .rpd file into the quad SPI flash for FPGA configuration.
Level Two Title