Intel® FPGA RTE for OpenCL™ Pro Edition: Getting Started Guide

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ID 683173
Date 12/19/2022
Public
Document Table of Contents
Document Table of Contents x
Product Discontinuance Notification 1. Intel® FPGA RTE for OpenCL™ Pro Edition Getting Started Guide 2. Getting Started with the Intel® FPGA RTE for OpenCL™ Pro Edition for 64-Bit Windows 3. Getting Started with the Intel® FPGA RTE for OpenCL™ Pro Edition for x86_64 Linux Systems 4. Getting Started with the Intel® FPGA RTE for OpenCL™ Pro Edition for Intel® ARMv7-A SoC FPGA A. Intel® FPGA RTE for OpenCL™ Pro Edition Getting Started Guide Archives B. Document Revision History of the Intel® FPGA RTE for OpenCL™ Pro Edition Getting Started Guide
1. Intel® FPGA RTE for OpenCL™ Pro Edition Getting Started Guide x
1.1. Prerequisites for the Intel® FPGA RTE for OpenCL™ Pro Edition 1.2. Contents of the Intel® FPGA RTE for OpenCL™ Pro Edition 1.3. RTE Utility 1.4. Overview of the Intel® FPGA RTE for OpenCL™ Pro Edition Setup Process
1.1. Prerequisites for the Intel® FPGA RTE for OpenCL™ Pro Edition x
1.1.1. GCC Requirement
1.3. RTE Utility x
1.3.1. Displaying the Software Version 1.3.2. Listing the Intel® FPGA RTE for OpenCL™ Utility Command Options 1.3.3. Managing an FPGA Board 1.3.4. Managing Host Application
2. Getting Started with the Intel® FPGA RTE for OpenCL™ Pro Edition for 64-Bit Windows x
2.1. Downloading the Intel® FPGA RTE for OpenCL™ Pro Edition 2.2. Installing the Intel® FPGA RTE for OpenCL™ Pro Edition 2.3. Setting the Intel® FPGA RTE for OpenCL™ Pro Edition User Environment Variables 2.4. Verifying Software Installation 2.5. Installing an FPGA Board 2.6. Updating the Hardware Image on the FPGA 2.7. Executing an OpenCL Kernel on an FPGA 2.8. Uninstalling the Software 2.9. Uninstalling an FPGA Board
2.6. Updating the Hardware Image on the FPGA x
2.6.1. Querying the Device Name of Your FPGA Board 2.6.2. Programming the Flash Memory of an FPGA
2.7. Executing an OpenCL Kernel on an FPGA x
2.7.1. Building the Host Application 2.7.2. Running the Host Application 2.7.3. Output from Successful Kernel Execution
3. Getting Started with the Intel® FPGA RTE for OpenCL™ Pro Edition for x86_64 Linux Systems x
3.1. Downloading the Intel® FPGA RTE for OpenCL™ Pro Edition 3.2. Installing the Intel® FPGA RTE for OpenCL™ Pro Edition 3.3. Verifying Software Installation 3.4. Installing an FPGA Board 3.5. Updating the Hardware Image on the FPGA 3.6. Executing an OpenCL Kernel on an FPGA 3.7. Uninstalling the Software 3.8. Uninstalling an FPGA Board
3.2. Installing the Intel® FPGA RTE for OpenCL™ Pro Edition x
3.2.1. Setting the Intel® FPGA RTE for OpenCL™ Pro Edition User Environment Variables
3.5. Updating the Hardware Image on the FPGA x
3.5.1. Querying the Device Name of Your FPGA Board 3.5.2. Programming the Flash Memory of an FPGA
3.6. Executing an OpenCL Kernel on an FPGA x
3.6.1. Building the Host Application 3.6.2. Running the Host Application 3.6.3. Output from Successful Kernel Execution
4. Getting Started with the Intel® FPGA RTE for OpenCL™ Pro Edition for Intel® ARMv7-A SoC FPGA x
4.1. Getting Started with the Intel® FPGA RTE for OpenCL™ Pro Edition for SoC FPGA on Windows 4.2. Getting Started with the Intel® FPGA RTE for OpenCL™ Pro Edition for SoC FPGA on Linux
4.1. Getting Started with the Intel® FPGA RTE for OpenCL™ Pro Edition for SoC FPGA on Windows x
4.1.1. Downloading the Intel® FPGA SDK for OpenCL and the SoC EDS 4.1.2. Installing the Intel® FPGA SDK for OpenCL Pro Edition for SoC FPGA 4.1.3. Installing the Intel® SoC FPGA Embedded Development Suite Pro Edition 4.1.4. Recompiling the Linux Kernel Driver 4.1.5. Installing the Intel FPGA RTE for OpenCL Pro Edition onto the SoC FPGA Board 4.1.6. Installing the Intel® Arria® 10 SoC Development Kit 4.1.7. Executing an OpenCL Kernel on an SoC FPGA 4.1.8. Uninstalling the Intel® FPGA RTE for OpenCL™
4.1.7. Executing an OpenCL Kernel on an SoC FPGA x
4.1.7.1. Building the Host Application 4.1.7.2. Running the Host Application
4.2. Getting Started with the Intel® FPGA RTE for OpenCL™ Pro Edition for SoC FPGA on Linux x
4.2.1. Downloading the Intel® FPGA SDK for OpenCL™ and the SoC EDS 4.2.2. Installing the Intel® FPGA SDK for OpenCL Pro Edition for SoC FPGA 4.2.3. Installing the Intel® SoC FPGA Embedded Development Suite Pro Edition 4.2.4. Recompiling the Linux Kernel Driver 4.2.5. Installing the Intel FPGA RTE for OpenCL Pro Edition onto the SoC FPGA Board 4.2.6. Installing the Intel® Arria® 10 SoC Development Kit 4.2.7. Executing an OpenCL Kernel on an SoC FPGA 4.2.8. Uninstalling the Intel® FPGA RTE for OpenCL™
4.2.7. Executing an OpenCL Kernel on an SoC FPGA x
4.2.7.1. Building the Host Application 4.2.7.2. Running the Host Application
Product Discontinuance Notification
1. Intel® FPGA RTE for OpenCL™ Pro Edition Getting Started Guide
2. Getting Started with the Intel® FPGA RTE for OpenCL™ Pro Edition for 64-Bit Windows
3. Getting Started with the Intel® FPGA RTE for OpenCL™ Pro Edition for x86_64 Linux Systems
4. Getting Started with the Intel® FPGA RTE for OpenCL™ Pro Edition for Intel® ARMv7-A SoC FPGA
A. Intel® FPGA RTE for OpenCL™ Pro Edition Getting Started Guide Archives
B. Document Revision History of the Intel® FPGA RTE for OpenCL™ Pro Edition Getting Started Guide

2.7.3. Output from Successful Kernel Execution

When you run the host application to execute your OpenCL™ kernel on the target FPGA, the OpenCL™ software notifies you of a successful kernel execution.

Example output: 

Reprogramming device [0] with handle 1
Querying platform for info:
==========================
CL_PLATFORM_NAME                         = Intel(R) FPGA SDK for OpenCL(TM)
CL_PLATFORM_VENDOR                       = Intel Corporation
CL_PLATFORM_VERSION = OpenCL 1.0 Intel(R) FPGA SDK for OpenCL(TM), <version>

Querying device for info:
========================
CL_DEVICE_NAME                           = <board name> : <descriptive board name>
CL_DEVICE_VENDOR                         = <board vendor name>
CL_DEVICE_VENDOR_ID                      = <board vendor ID>
CL_DEVICE_VERSION   = OpenCL 1.0 Intel(R) FPGA SDK for OpenCL(TM), <version>
CL_DRIVER_VERSION                        = <version>
CL_DEVICE_ADDRESS_BITS                   = 64
CL_DEVICE_AVAILABLE                      = true
CL_DEVICE_ENDIAN_LITTLE                  = true
CL_DEVICE_GLOBAL_MEM_CACHE_SIZE          = 32768
CL_DEVICE_GLOBAL_MEM_CACHELINE_SIZE      = 0
CL_DEVICE_GLOBAL_MEM_SIZE                = 8589934592
CL_DEVICE_IMAGE_SUPPORT                  = true
CL_DEVICE_LOCAL_MEM_SIZE                 = 16384
CL_DEVICE_MAX_CLOCK_FREQUENCY            = 1000
CL_DEVICE_MAX_COMPUTE_UNITS              = 1
CL_DEVICE_MAX_CONSTANT_ARGS              = 8
CL_DEVICE_MAX_CONSTANT_BUFFER_SIZE       = 2147483648
CL_DEVICE_MAX_WORK_ITEM_DIMENSIONS       = 3
CL_DEVICE_MEM_BASE_ADDR_ALIGN            = 8192
CL_DEVICE_MIN_DATA_TYPE_ALIGN_SIZE       = 1024
CL_DEVICE_PREFERRED_VECTOR_WIDTH_CHAR    = 4
CL_DEVICE_PREFERRED_VECTOR_WIDTH_SHORT   = 2
CL_DEVICE_PREFERRED_VECTOR_WIDTH_INT     = 1
CL_DEVICE_PREFERRED_VECTOR_WIDTH_LONG    = 1
CL_DEVICE_PREFERRED_VECTOR_WIDTH_FLOAT   = 1
CL_DEVICE_PREFERRED_VECTOR_WIDTH_DOUBLE  = 0
Command queue out of order?              = false
Command queue profiling enabled?         = true
Using AOCX: hello_world.aocx

Kernel initialization is complete.
Launching the kernel...

Thread #2: Hello from the Intel(R) FPGA OpenCL(TM) compiler!

Kernel execution is complete.
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