Intel® FPGA RTE for OpenCL™ Pro Edition: Getting Started Guide

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ID 683173
Date 12/13/2021
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Document Table of Contents
Document Table of Contents x
1. Intel® FPGA RTE for OpenCL™ Pro Edition Getting Started Guide 2. Getting Started with the Intel® FPGA RTE for OpenCL™ Pro Edition for 64-Bit Windows 3. Getting Started with the Intel® FPGA RTE for OpenCL™ Pro Edition for x86_64 Linux Systems 4. Getting Started with the Intel® FPGA RTE for OpenCL™ Pro Edition for Intel® ARMv7-A SoC FPGA A. Intel® FPGA RTE for OpenCL™ Pro Edition Getting Started Guide Archives B. Document Revision History of the Intel® FPGA RTE for OpenCL™ Pro Edition Getting Started Guide
1. Intel® FPGA RTE for OpenCL™ Pro Edition Getting Started Guide x
1.1. Prerequisites for the Intel® FPGA RTE for OpenCL™ Pro Edition 1.2. Contents of the Intel® FPGA RTE for OpenCL™ Pro Edition 1.3. RTE Utility 1.4. Overview of the Intel® FPGA RTE for OpenCL™ Pro Edition Setup Process
1.1. Prerequisites for the Intel® FPGA RTE for OpenCL™ Pro Edition x
1.1.1. GCC Requirement
1.3. RTE Utility x
1.3.1. Displaying the Software Version 1.3.2. Listing the Intel® FPGA RTE for OpenCL™ Utility Command Options 1.3.3. Managing an FPGA Board 1.3.4. Managing Host Application
2. Getting Started with the Intel® FPGA RTE for OpenCL™ Pro Edition for 64-Bit Windows x
2.1. Downloading the Intel® FPGA RTE for OpenCL™ Pro Edition 2.2. Installing the Intel® FPGA RTE for OpenCL™ Pro Edition 2.3. Setting the Intel® FPGA RTE for OpenCL™ Pro Edition User Environment Variables 2.4. Verifying Software Installation 2.5. Installing an FPGA Board 2.6. Updating the Hardware Image on the FPGA 2.7. Executing an OpenCL Kernel on an FPGA 2.8. Uninstalling the Software 2.9. Uninstalling an FPGA Board
2.6. Updating the Hardware Image on the FPGA x
2.6.1. Querying the Device Name of Your FPGA Board 2.6.2. Programming the Flash Memory of an FPGA
2.7. Executing an OpenCL Kernel on an FPGA x
2.7.1. Building the Host Application 2.7.2. Running the Host Application 2.7.3. Output from Successful Kernel Execution
3. Getting Started with the Intel® FPGA RTE for OpenCL™ Pro Edition for x86_64 Linux Systems x
3.1. Downloading the Intel® FPGA RTE for OpenCL™ Pro Edition 3.2. Installing the Intel® FPGA RTE for OpenCL™ Pro Edition 3.3. Verifying Software Installation 3.4. Installing an FPGA Board 3.5. Updating the Hardware Image on the FPGA 3.6. Executing an OpenCL Kernel on an FPGA 3.7. Uninstalling the Software 3.8. Uninstalling an FPGA Board
3.2. Installing the Intel® FPGA RTE for OpenCL™ Pro Edition x
3.2.1. Setting the Intel® FPGA RTE for OpenCL™ Pro Edition User Environment Variables
3.5. Updating the Hardware Image on the FPGA x
3.5.1. Querying the Device Name of Your FPGA Board 3.5.2. Programming the Flash Memory of an FPGA
3.6. Executing an OpenCL Kernel on an FPGA x
3.6.1. Building the Host Application 3.6.2. Running the Host Application 3.6.3. Output from Successful Kernel Execution
4. Getting Started with the Intel® FPGA RTE for OpenCL™ Pro Edition for Intel® ARMv7-A SoC FPGA x
4.1. Getting Started with the Intel® FPGA RTE for OpenCL™ Pro Edition for SoC FPGA on Windows 4.2. Getting Started with the Intel® FPGA RTE for OpenCL™ Pro Edition for SoC FPGA on Linux
4.1. Getting Started with the Intel® FPGA RTE for OpenCL™ Pro Edition for SoC FPGA on Windows x
4.1.1. Downloading the Intel® FPGA SDK for OpenCL and the SoC EDS 4.1.2. Installing the Intel® FPGA SDK for OpenCL Pro Edition for SoC FPGA 4.1.3. Installing the Intel® SoC FPGA Embedded Development Suite Pro Edition 4.1.4. Recompiling the Linux Kernel Driver 4.1.5. Installing the Intel FPGA RTE for OpenCL Pro Edition onto the SoC FPGA Board 4.1.6. Installing the Intel® Arria® 10 SoC Development Kit 4.1.7. Executing an OpenCL Kernel on an SoC FPGA 4.1.8. Uninstalling the Intel® FPGA RTE for OpenCL™
4.1.7. Executing an OpenCL Kernel on an SoC FPGA x
4.1.7.1. Building the Host Application 4.1.7.2. Running the Host Application
4.2. Getting Started with the Intel® FPGA RTE for OpenCL™ Pro Edition for SoC FPGA on Linux x
4.2.1. Downloading the Intel® FPGA SDK for OpenCL™ and the SoC EDS 4.2.2. Installing the Intel® FPGA SDK for OpenCL Pro Edition for SoC FPGA 4.2.3. Installing the Intel® SoC FPGA Embedded Development Suite Pro Edition 4.2.4. Recompiling the Linux Kernel Driver 4.2.5. Installing the Intel FPGA RTE for OpenCL Pro Edition onto the SoC FPGA Board 4.2.6. Installing the Intel® Arria® 10 SoC Development Kit 4.2.7. Executing an OpenCL Kernel on an SoC FPGA 4.2.8. Uninstalling the Intel® FPGA RTE for OpenCL™
4.2.7. Executing an OpenCL Kernel on an SoC FPGA x
4.2.7.1. Building the Host Application 4.2.7.2. Running the Host Application
1. Intel® FPGA RTE for OpenCL™ Pro Edition Getting Started Guide
2. Getting Started with the Intel® FPGA RTE for OpenCL™ Pro Edition for 64-Bit Windows
3. Getting Started with the Intel® FPGA RTE for OpenCL™ Pro Edition for x86_64 Linux Systems
4. Getting Started with the Intel® FPGA RTE for OpenCL™ Pro Edition for Intel® ARMv7-A SoC FPGA
A. Intel® FPGA RTE for OpenCL™ Pro Edition Getting Started Guide Archives
B. Document Revision History of the Intel® FPGA RTE for OpenCL™ Pro Edition Getting Started Guide

2.6.1. Querying the Device Name of Your FPGA Board3.5.1. Querying the Device Name of Your FPGA Board

Some OpenCL™ software utility commands require you to specify the device name (<device_name>). The <device_name> refers to the acl number (e.g., acl0 to acl127) that corresponds to the FPGA device. When you query a list of accelerator boards, the OpenCL software produces a list of installed devices on your machine in the order of their device names.
To query a list of installed devices on your machine, type aocl diagnose at a command prompt.
The software generates an output that resembles the example shown below: 
aocl diagnose: Running diagnostic from <board_package_path>/<board_name>/<platform>/libexec

Verified that the kernel mode driver is installed on the host machine.

Using board package from vendor: <board_vendor_name>
Querying information for all supported devices that are installed on the host machine ...

device_name  Status  Information

acl0         Passed  <descriptive_board_name>
                     PCIe dev_id = <device_ID>, bus:slot.func = 02:00.00,
                       at Gen 2 with 8 lanes.
                     FPGA temperature = 43.0 degrees C.

acl1         Passed  <descriptive_board_name> 
                     PCIe dev_id = <device_ID>, bus:slot.func = 03:00.00,
                       at Gen 2 with 8 lanes.
                     FPGA temperature = 35.0 degrees C.

Found 2 active device(s) installed on the host machine, to perform a full diagnostic on a specific device, please run aocl diagnose <device_name>

DIAGNOSTIC_PASSED
Level Two Title