Intel® MAX® 10 FPGA Device Architecture

ID 683105
Date 10/31/2022
Public
Document Table of Contents

1.1.3.2.1. Normal Mode

Normal mode is suitable for general logic applications and combinational functions.

In normal mode, four data inputs from the LAB local interconnect are inputs to a four-input LUT. The Intel® Quartus® Prime Compiler automatically selects the carry-in (cin) or the data3 signal as one of the inputs to the LUT. LEs in normal mode support packed registers and register feedback.

Figure 6. LE Operating in Normal Mode for Intel® MAX® 10 devices