Nios® V Processor Intel® FPGA IP Release Notes

Download PDF
ID 683098
Date 10/07/2024
Public
Document Table of Contents
Document Table of Contents x
1. Nios® V Processor Intel® FPGA IP Release Notes 2. Nios® V/m Processor Intel® FPGA IP ( Quartus® Prime Pro Edition) Release Notes 3. Nios® V/m Processor Intel® FPGA IP ( Quartus® Prime Standard Edition) Release Notes 4. Nios® V/g Processor Intel® FPGA IP ( Quartus® Prime Pro Edition) Release Notes 5. Nios® V/g Processor Intel® FPGA IP ( Quartus® Prime Standard Edition) Release Notes 6. Nios® V/c Processor Intel® FPGA IP ( Quartus® Prime Pro Edition) Release Notes 7. Nios® V/c Processor Intel® FPGA IP ( Quartus® Prime Standard Edition) Release Notes
2. Nios® V/m Processor Intel® FPGA IP ( Quartus® Prime Pro Edition) Release Notes x
2.1. Nios® V/m Processor Intel® FPGA IP v25.0.0 2.2. Nios® V/m Processor Intel® FPGA IP v24.0.0 2.3. Nios® V/m Processor Intel® FPGA IP v23.2.0 2.4. Nios® V/m Processor Intel® FPGA IP v23.1.0 2.5. Nios® V/m Processor Intel® FPGA IP v23.0.0 2.6. Nios® V/m Processor Intel® FPGA IP v22.4.3 2.7. Nios® V/m Processor Intel® FPGA IP v22.4.0 2.8. Nios® V/m Processor Intel® FPGA IP v22.3.0 2.9. Nios® V/m Processor Intel® FPGA IP v21.3.0 2.10. Nios® V/m Processor Intel® FPGA IP v21.2.0 2.11. Nios® V/m Processor Intel® FPGA IP v21.1.1 2.12. Nios® V/m Processor Intel® FPGA IP v21.1.0
3. Nios® V/m Processor Intel® FPGA IP ( Quartus® Prime Standard Edition) Release Notes x
3.1. Nios® V/m Processor Intel® FPGA IP v2.0.0 3.2. Nios® V/m Processor Intel® FPGA IP v1.0.0
4. Nios® V/g Processor Intel® FPGA IP ( Quartus® Prime Pro Edition) Release Notes x
4.1. Nios® V/g Processor Intel® FPGA IP v3.0.0 4.2. Nios® V/g Processor Intel® FPGA IP v2.2.0 4.3. Nios® V/g Processor Intel® FPGA IP v2.1.0 4.4. Nios® V/g Processor Intel® FPGA IP v2.0.0 4.5. Nios® V/g Processor Intel® FPGA IP v1.0.0
5. Nios® V/g Processor Intel® FPGA IP ( Quartus® Prime Standard Edition) Release Notes x
5.1. Nios® V/g Processor Intel® FPGA IP v1.0.0
6. Nios® V/c Processor Intel® FPGA IP ( Quartus® Prime Pro Edition) Release Notes x
6.1. Nios® V/c Processor Intel® FPGA IP v2.0.0 6.2. Nios® V/c Processor Intel® FPGA IP v1.2.0 6.3. Nios® V/c Processor Intel® FPGA IP v1.1.0 6.4. Nios® V/c Processor Intel® FPGA IP v1.0.0
7. Nios® V/c Processor Intel® FPGA IP ( Quartus® Prime Standard Edition) Release Notes x
7.1. Nios® V/c Processor Intel® FPGA IP v1.0.0
1. Nios® V Processor Intel® FPGA IP Release Notes
2. Nios® V/m Processor Intel® FPGA IP ( Quartus® Prime Pro Edition) Release Notes
3. Nios® V/m Processor Intel® FPGA IP ( Quartus® Prime Standard Edition) Release Notes
4. Nios® V/g Processor Intel® FPGA IP ( Quartus® Prime Pro Edition) Release Notes
5. Nios® V/g Processor Intel® FPGA IP ( Quartus® Prime Standard Edition) Release Notes
6. Nios® V/c Processor Intel® FPGA IP ( Quartus® Prime Pro Edition) Release Notes
7. Nios® V/c Processor Intel® FPGA IP ( Quartus® Prime Standard Edition) Release Notes

3.1. Nios® V/m Processor Intel® FPGA IP v2.0.0

Table 13.  v2.0.0 2023.12.11
Quartus® Prime Version Description Impact
23.1std
  • Removed Atomic extension.
  • Updated the Nios® V/m Processor Internal Timer interface.
  • Renamed the IP display name from Nios® V/m Processor Intel® FPGA IP to Nios® V/m Microcontroller Intel® FPGA IP .
  • Added ECC module and non-pipelined configuration.
  • Changed Instruction and Data Manager Interfaces from AXI4 to AXI4-Lite.
  • Enhanced prefetch logic. Updated the following performance and benchmark numbers:
    • FMAX
    • Area
    • Dhrystone
    • CoreMark
  • Remove exceptionOffset and exceptionAgent parameters from _hw.tcl.
    Note: Only impacted BSP generation. No impact on RTL or circuit.
  • Changed debug reset:
    • Added ndm_reset_in port
    • Renamed dbg_reset to dbg_reset_out.
  • Migrated the example designs to the Intel® FPGA Design Store.
  • Enabled Zephyr RTOS.
 -
Level Two Title