Visible to Intel only — GUID: mwh1452708873281
Ixiasoft
False Paths
False paths can be applied either to clock-to-clock transfers or to individual registers. Applying false paths to clock-to-clock transfers cuts all paths between the target clocks.
In the False Path Clock-to-Clock example, the path is cut and not analyzed by the Timing Analyzer for any register-to-register path where the source clock is clkA and the destination clock is clkB. This does not affect register-to-register paths where the source register is clocked by clkB and the destination register is clocked by clkA.
Applying false paths to individual registers cuts only the path specified.
False Path Clock-to-Clock
create_clock -period 12 [get_ports clkA]
create_clock -period 5 [get_ports clkB]
set_false_path -from [get_clocks {clkA}] -to [get_clocks {clkB}]
In the False Path Register-to-Register example, the register-to-register path from register reg1 to register reg2 is cut. All other paths remain unaffected.
False Path Register-to-Register
create_clock -period 10 [get_ports clkA]
create_clock -period 5 [get_ports clkB]
set_false_path -from [get_pins {reg1|q}] -to [get_pins {reg2|d}]